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NCV7349D13R2G

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onsemi CAN Transceivers, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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NCV7349D13R2G

onsemi · CAN Transceivers · SOIC-8

NCV7349D13R2G from onsemi, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 TxD input Transmit data input; a low input drives the bus dominant, it has internal pull-up current, VIH is 2.0 V to VIO and VIL is −0.3 V to +0.8 V.
2 GND power_in Ground reference; all voltages in the datasheet are referenced to this pin.
3 VCC power_in Supply voltage, 4.75 V to 5.25 V in the recommended operating range; undervoltage detection on VCC is 2 V to 4 V.
4 RxD output Receive data output that goes low when the bus is dominant, with IOL of 1.6 mA to 12 mA at VRxD = 0.4 V.
5 VIO power_in Supply for the digital inputs and outputs (TxD, RxD, STB) on the NCV7349-3, specified at 2.8 V to 5.5 V and to be connected to the microcontroller supply; pin 5 is not connected on the NCV7349-0.
6 CANL bidirectional Low-level CAN bus line, low in dominant mode, with dominant output voltage of 0.5 V to 1.75 V.
7 CANH bidirectional High-level CAN bus line, high in dominant mode, with dominant output voltage of 3.0 V to 4.25 V.
8 STB input Standby mode control input with internal pull-up current; VIH is 2.0 V in standby mode and VIL is −0.3 V to +0.8 V in normal mode.

Key specifications

Parameter Value
Manufacturer onsemi
Package SOIC-8
Category Interface
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Power supply voltage VCC 4.75 5.25 V (Note 1) 2
Undervoltage detection voltage on pin Vcc VUV 2 4 V 2
DC voltage at pin CANH and CANL during load dump condition VCANH,Lmax 58 V 0 < VCC < 5.5 V, less than one second 2
Electrostatic discharge voltage IEC 61000-4-2 at pins CANH and CANL VESD -15 15 kV 2
Differential bus output voltage in dominant state VO(dif)(bus_dom) 1.5 3 V 45 < RLT < 65 2
Input common-mode range for comparator CM-range -35 35 V Guaranteed differential receiver threshold and leakage current 2
Load capacitance on IC outputs Cload 15 pF 2
Propagation delay (NCV7349-3 version) tpd3 250 ns See Figure 7 2
Junction temperature TJ -40 150 °C 2
Supply voltage VCC, VIO VSUP -0.3 6 V 6
DC voltage at pin CANH VCANH -50 50 V 0 < VCC < 5.5 V; no time limit 6
DC voltage at pin CANL VCANL -50 50 V 0 < VCC < 5.5 V; no time limit 6
DC voltage at pin TxD, RxD, STB VIO -0.3 6 V 6
Electrostatic discharge voltage at all pins Vesd -6 6 kV (Note 2) 6
Electrostatic discharge voltage at all pins Vesd -500 500 V (Note 3) 6
Electrostatic discharge voltage at CANH and CANL pins -10 10 kV (Note 4) 6
Transient voltage Vschaff -150 100 V (Note 5) 6
Static latch-up at all pins Latch-up 150 mA (Note 6) 6
Storage temperature Tstg -55 150 °C 6
Ambient temperature TA -40 125 °C 6
Maximum junction temperature TJ -40 170 °C 6
Supply current ICC 48 75 mA Dominant; VTxD = 0 V 7
Supply current ICC 6 10 mA Recessive; VTxD = VIO 7
Supply current in standby mode ICCS 10 15 A TJ ≤ 100°C, (Note 9) 7
Undervoltage detection voltage on VCC pin VUVDVCC 2 3 4 V 7
Supply voltage on pin VIO VIO 2.8 5.5 V 7
Supply current on pin VIO in normal mode IIONM 1 mA Dominant; VTxD = 0 V; For VIO ≤ VCC 7
Supply current on pin VIO in normal mode IIONM 0.2 mA Recessive; VTxD = VIO; For VIO ≤ VCC 7
Undervoltage detection voltage on VIO pin VUVDVIO 1.3 2.7 V 7
High-level input voltage (TxD) VIH 2 V Output recessive 7
Low-level input voltage (TxD) VIL -0.3 0.8 V Output dominant 7
Low-level input current (TxD) IIL -350 -200 A VTxD = 0 V 7
High-level input voltage (STB) VIH 2 V Standby mode 7
Low-level input voltage (STB) VIL -0.3 0.8 V Normal mode 7
Low-level input current, NCV7349-3 IIL3 -40 -20 -4 A VSTB = 0 V 7
High-level output current (RxD) IOH -1 -0.4 -0.1 mA Normal mode, VRxD = VIO, 0.4 V 7
Low-level output current (RxD) IOL 1.6 6 12 mA VRxD = 0.4 V 7
Recessive bus voltage on pins CANH and CANL (normal mode) Vo(reces) (norm) 2 2.5 3 V VTxD = VIO; no load; normal mode 7
Recessive bus voltage on pins CANH and CANL (standby mode) Vo(reces) (stby) -100 0 100 mV VTxD = VIO; no load; standby mode 7
Dominant output voltage at pin CANH Vo(dom) (CANH) 3 3.6 4.25 V VTxD = 0 V 8
Dominant output voltage at pin CANL Vo(dom) (CANL) 0.5 1.4 1.75 V VTxD = 0 V 8
Differential bus output voltage (VCANH − VCANL) dominant Vo(dif) (bus_dom) 1.5 2.25 3 V VTxD = 0 V; dominant; 45 < RLT < 65 8
Differential bus output voltage (VCANH − VCANL) recessive Vo(dif) (bus_rec) -120 0 50 mV VTxD = VIO; recessive; no load 8
Short circuit output current at pin CANH Io(sc) (CANH) -100 -70 -45 mA VCANH = 0 V; VTxD = 0 V 8
Short circuit output current at pin CANL Io(sc) (CANL) 45 70 100 mA VCANL = 36 V; VTxD = 0 V 8
Differential receiver threshold voltage Dominant to Recessive Vi(dif)R (th) 0.5 0.6 0.7 V −2 V < VCANL < +7 V; −2 V < VCANH < +7 V 8
Differential receiver threshold voltage Recessive to Dominant Vi(dif)D (th) 0.7 0.8 0.9 V −2 V < VCANL < +7 V; −2 V < VCANH < +7 V 8
Differential receiver input voltage hysteresis Vi(dif) (hys) 100 200 300 mV −2 V < VCANL < +7 V; −2 V < VCANH < +7 V 8
Differential receiver threshold voltage in standby mode Vi(dif)(th)_STDBY 0.4 0.8 1.15 V −12 V < VCANL < +12 V; −12 V < VCANH < +12 V 8
Shutdown junction temperature TJ(sd) 150 170 185 °C Junction temperature rising 8
Propagation delay TxD to RxD (NCV7349-3 version) tpd 130 250 ns Ci = 100 pF between CANH to CANL 9
Delay standby mode to normal mode td(stb−nm) 5 8 20 s 9
Dominant time for wake-up via bus twake 0.5 2.5 5 s 9
Delay to flag wake event (recessive to dominant transitions) tdwakerd 1 4.5 10 s Valid bus wake-up event, CRxD = 15 pF 9
Delay to flag wake event (dominant to recessive transitions) tdwakedr 0.5 3.3 7 s Valid bus wake-up event, CRxD = 15 pF 9
Minimum pulse width on RxD twake(RxD) 0.5 s 5 s tWAKE, CRxD = 15 pF 9
TxD dominant time for time-out tdom(TxD) 1.2 2.6 4 ms VTxD = 0 V 9
Thermal resistance Junction-to-Air, 1S0P PCB RJA_1 125 K/W Free air; (Note 7) 6
Thermal resistance Junction-to-Air, 2S2P PCB RJA_2 75 K/W Free air; (Note 8) 6

CAD (KiCad official)

  • Symbol: NCV7349D13R2G
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: ncv7349d13r2g-etched.step / ncv7349d13r2g-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ncv7349d13r2g.step / ncv7349d13r2g.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: onsemi datasheet (12 pp, sha256 4fb5f46aaf05df79, retrieved 2026-10-20, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF