main
Ray ncv59745amw1015tag: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) b5a4ad4 1mo ago
{
  "schema_version": 1,
  "type": "component",
  "slug": "ncv59745amw1015tag",
  "title": "NCV59745AMW1015TAG",
  "brief": "onsemi Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, QFN-20(4x4). Pinout extracted from the datasheet, KiCad symbol/footprint/3D.",
  "version": "0.1.0",
  "license": "CC-BY-SA-4.0",
  "tags": [
    "component",
    "power management (pmic)",
    "ncv59745amw1015tag"
  ],
  "component": {
    "mpn": "NCV59745AMW1015TAG",
    "manufacturer": "onsemi",
    "package": "QFN-20(4x4)",
    "pin_count": 21,
    "category": "Power Management (PMIC)",
    "subcategory": "Voltage Regulators - Linear, Low Drop Out (LDO) Regulators",
    "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588929233371975680",
    "parts": {
      "symbol": "ncv59745amw1015tag.kicad_sym",
      "footprint": "ncv59745amw1015tag.kicad_mod",
      "model_3d": "ncv59745amw1015tag-etched.glb",
      "model_3d_plain": "ncv59745amw1015tag.glb",
      "model_3d_step": "ncv59745amw1015tag-etched.step",
      "model_3d_step_plain": "ncv59745amw1015tag.step",
      "lbr": "ncv59745amw1015tag.lbr"
    },
    "distributor_links": {},
    "pins": [
      {
        "number": "1",
        "name": "OUT",
        "type": "power_out",
        "description": "Regulated output voltage pin. Tied together with pins 19 and 20. Requires a ceramic output capacitor >= 10 uF effective value; output current in excess of 3.0 A; VOUT range 0.8 V to 3.6 V (fixed 1.015 V for the AMW1015TAG suffix)."
      },
      {
        "number": "2",
        "name": "SNS",
        "type": "input",
        "description": "Output voltage sense input pin. Used by the internal error amplifier to regulate VOUT. Must not be left floating; connect at/near the load-side of OUT for Kelvin sensing."
      },
      {
        "number": "3",
        "name": "NC",
        "type": "unconnected",
        "description": "No connection. True NC pin - may be left floating or tied to GND for improved thermal contact to the PCB top-side plane."
      },
      {
        "number": "4",
        "name": "PG",
        "type": "output",
        "description": "Power-Good open-drain, active-high output. High-impedance when VOUT exceeds the PG trip threshold (~91% of VOUT typ), low-impedance below it. Requires a 10 kOhm to 100 kOhm external pull-up to a rail up to 5.5 V; may be left floating if unused. PG sink current 0 to 1.5 mA; VPG,LO <= 0.3 V at 1 mA."
      },
      {
        "number": "5",
        "name": "NC",
        "type": "unconnected",
        "description": "No connection. True NC pin - may be left floating or tied to GND for improved thermal contact to the PCB top-side plane."
      },
      {
        "number": "6",
        "name": "NC",
        "type": "unconnected",
        "description": "No connection. True NC pin - may be left floating or tied to GND for improved thermal contact to the PCB top-side plane."
      },
      {
        "number": "7",
        "name": "NC",
        "type": "unconnected",
        "description": "No connection. True NC pin - may be left floating or tied to GND for improved thermal contact to the PCB top-side plane."
      },
      {
        "number": "8",
        "name": "GND",
        "type": "power_in",
        "description": "Device ground. Must be connected to the PCB ground plane along with pin 18 and the exposed thermal pad."
      },
      {
        "number": "9",
        "name": "NC",
        "type": "unconnected",
        "description": "No connection. True NC pin - may be left floating or tied to GND for improved thermal contact to the PCB top-side plane."
      },
      {
        "number": "10",
        "name": "NC",
        "type": "unconnected",
        "description": "No connection. True NC pin - may be left floating or tied to GND for improved thermal contact to the PCB top-side plane."
      },
      {
        "number": "11",
        "name": "NC",
        "type": "unconnected",
        "description": "No connection. True NC pin - may be left floating or tied to GND for improved thermal contact to the PCB top-side plane."
      },
      {
        "number": "12",
        "name": "BIAS",
        "type": "power_in",
        "description": "Bias input voltage powering the error amplifier, VREF reference, and internal control circuitry. VBIAS range 2.2 V to 5.5 V; recommended CBIAS >= 1 uF ceramic connected directly at the pin. Absolute max -0.3 V to +6 V."
      },
      {
        "number": "13",
        "name": "SS",
        "type": "passive",
        "description": "Soft-Start programming pin. External capacitor CSS to GND sets the soft-start ramp time per tSS[ms] = CSS[nF] x 0.13 (max recommended CSS = 1 uF). Charged by ISS ~ 6.2 x VOUT(NOM)/0.8V uA. Absolute max -0.3 V to (VBIAS+0.3) V, <= 6 V."
      },
      {
        "number": "14",
        "name": "EN",
        "type": "input",
        "description": "Enable input. Drive high (VEN,HI >= 1.1 V) to enable the regulator; drive low (VEN,LO <= 0.4 V) for shutdown. Must not be left floating; features 100 mV hysteresis and 20 us deglitch. IEN ~ 0.3 uA @ VEN = 5 V. Absolute max -0.3 V to +6 V."
      },
      {
        "number": "15",
        "name": "IN",
        "type": "power_in",
        "description": "Unregulated input voltage to the pass device. Pins 15, 16, 17 must be tied together. VIN range 0.8 V to 5.5 V (VIN >= VOUT + VDO); recommended CIN >= 4.7 uF ceramic connected directly at the pin. Absolute max -0.3 V to +6 V."
      },
      {
        "number": "16",
        "name": "IN",
        "type": "power_in",
        "description": "Unregulated input voltage to the pass device. Tied together with pins 15 and 17."
      },
      {
        "number": "17",
        "name": "IN",
        "type": "power_in",
        "description": "Unregulated input voltage to the pass device. Tied together with pins 15 and 16."
      },
      {
        "number": "18",
        "name": "GND",
        "type": "power_in",
        "description": "Device ground. Must be connected to the PCB ground plane along with pin 8 and the exposed thermal pad."
      },
      {
        "number": "19",
        "name": "OUT",
        "type": "power_out",
        "description": "Regulated output voltage pin. Tied together with pins 1 and 20."
      },
      {
        "number": "20",
        "name": "OUT",
        "type": "power_out",
        "description": "Regulated output voltage pin. Tied together with pins 1 and 19."
      },
      {
        "number": "21",
        "name": "PAD",
        "type": "power_in",
        "description": "Exposed thermal pad on the bottom of the QFNW20 package. Must be soldered to the PCB ground plane for increased thermal performance (RthetaJA = 40 C/W with recommended thermal-via array)."
      }
    ],
    "provenance": {
      "extractor": "ds2sf",
      "datasheet": {
        "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588929233371975680",
        "pages": 12,
        "sha256": "04b620a2c3bcc9d9",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 21,
        "described": 21,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "ncv59745amw1015tag.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          4.0,
          4.0,
          0.77
        ],
        "zmin_mm": 0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "c9476a1612023de37f27b4972110ab6ac6dc0eaf5ac48957a2e1c497650082a5",
        "checked": "2026-10-07",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "ncv59745amw1015tag-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          4.0,
          4.0,
          0.77
        ],
        "zmin_mm": 0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "423b9c31fe3db38b87a9b9f5ee6ede3e483e752b2521d0b9b501c37aa77d5807",
        "checked": "2026-10-07",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  },
  "metadata": {
    "specs": {
      "Manufacturer": "onsemi",
      "Package": "QFN-20(4x4)",
      "Category": "Power Management (PMIC)",
      "Pins": "21"
    }
  },
  "variants": [
    {
      "mpn": "NCV59745AMW100TAG",
      "kind": "unknown"
    },
    {
      "mpn": "NCV59745AMW1015TAG",
      "kind": "packaging"
    },
    {
      "mpn": "NCV59745AMW180TAG",
      "kind": "unknown"
    },
    {
      "mpn": "NCV59745AMW1015TAGAMW250TAG",
      "kind": "packaging"
    }
  ],
  "sections": [
    "hero",
    "viewers",
    "readme",
    "breadcrumbs",
    "info"
  ],
  "discovery_triggers": [
    "ncv59745amw1015tag"
  ],
  "discovery_pitch": "NCV59745AMW1015TAG (onsemi) component page with datasheet-verified CAD.",
  "author": {
    "name": "Ray",
    "email": "[email protected]"
  },
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "ncv59745amw1015tag.kicad_sym",
    "ncv59745amw1015tag.kicad_mod",
    "ncv59745amw1015tag.glb",
    "ncv59745amw1015tag.step",
    "ncv59745amw1015tag.lbr",
    "docs/hero.png",
    "docs/ncv59745amw1015tag-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html"
  ],
  "visibility": {
    "public": true
  },
  "updated_at": "2026-09-25T03:06:48.328Z"
}