NCV57080CDR2G

{
  "schema_version": 1,
  "type": "component",
  "slug": "ncv57080cdr2g",
  "title": "NCV57080CDR2G",
  "brief": "onsemi Gate Drive ICs, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "version": "0.1.0",
  "license": "CC-BY-SA-4.0",
  "tags": [
    "component",
    "power management ics",
    "ncv57080cdr2g",
    "factory-2.0.0",
    "extractor-text"
  ],
  "component": {
    "mpn": "NCV57080CDR2G",
    "manufacturer": "onsemi",
    "package": "SOIC-8",
    "pin_count": 8,
    "category": "Power Management ICs",
    "subcategory": "Gate Drive ICs",
    "datasheet": "https://www.onsemi.com/pdf/datasheet/ncv57080c-d.pdf",
    "parts": {
      "symbol": "ncv57080cdr2g.kicad_sym",
      "footprint": "ncv57080cdr2g.kicad_mod",
      "model_3d": "ncv57080cdr2g-hero.glb",
      "model_3d_plain": "ncv57080cdr2g-etched.glb",
      "model_3d_step": "ncv57080cdr2g-etched.step",
      "model_3d_step_plain": "ncv57080cdr2g.step",
      "lbr": "ncv57080cdr2g.lbr"
    },
    "distributor_links": {
      "lcsc": "C904654",
      "digikey": "488-NCV57080CDR2GTR-ND",
      "mouser": "863-NCV57080CDR2G"
    },
    "distributor_check": {
      "checked_at": "2026-11-02T16:54:54Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": "488-NCV57080CDR2GTR-ND",
        "status": "found"
      },
      "mouser": {
        "pn": "863-NCV57080CDR2G",
        "status": "found"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "VDD1",
        "type": "power_in",
        "description": "Input side power supply that requires a good quality bypass capacitor to GND1 placed close to the pin, and the UVLO circuit enables operation at power-on when a typical supply voltage higher than VUVLO1-OUT-ON is present."
      },
      {
        "number": "2",
        "name": "IN+",
        "type": "input",
        "description": "Non-inverted gate driver input, internally clamped to GND1 with an equivalent 125 k pull-down resistor to keep the output low without an input signal, and a minimum positive or negative pulse width is required before the outputs respond."
      },
      {
        "number": "3",
        "name": "IN-",
        "type": "input",
        "description": "Inverted gate driver input, internally clamped to VDD1 with an equivalent 125 k pull-up resistor to keep the output low without an input signal, and a minimum positive or negative pulse width is required before the outputs respond."
      },
      {
        "number": "4",
        "name": "GND1",
        "type": "power_in",
        "description": "Input side ground reference."
      },
      {
        "number": "5",
        "name": "VDD2",
        "type": "power_in",
        "description": "Output side positive power supply with an operating range from UVLO2 to its maximum allowed value, requiring a good quality bypass capacitor to GND2 placed close to the pin."
      },
      {
        "number": "6",
        "name": "OUTH",
        "type": "output",
        "description": "Driver high output that provides the appropriate drive voltage and source current to the IGBT/MOSFET gate."
      },
      {
        "number": "7",
        "name": "OUTL",
        "type": "output",
        "description": "Driver low output that provides the appropriate drive voltage and sink current to the IGBT/MOSFET gate, and is actively pulled low during start-up."
      },
      {
        "number": "8",
        "name": "GND2",
        "type": "power_in",
        "description": "Output side gate drive reference connecting to the IGBT emitter or MOSFET source."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [],
        "pages_sent": 10,
        "cost_usd": 0.0167,
        "at": "2026-11-02T16:54:45"
      },
      "datasheet": {
        "url": "https://www.onsemi.com/pdf/datasheet/ncv57080c-d.pdf",
        "pages": 24,
        "sha256": "a01719ad55ec6781",
        "source_tier": "mfr"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 8,
        "described": 8,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "ncv57080cdr2g.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6,
          4.9,
          1.75
        ],
        "zmin_mm": 0,
        "centre_offset_mm": 0,
        "footprint_binding": "identity",
        "sha256": "07f46cff378d30e6c27dfd5a03092c795323f86d91c71fc7e743f4f418dc553a",
        "checked": "2026-11-02",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "ncv57080cdr2g-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6,
          4.9,
          1.75
        ],
        "zmin_mm": 0,
        "centre_offset_mm": 0,
        "footprint_binding": "identity",
        "sha256": "aec1bf472d40b030b40cd04d604d0828f51db52deb793a34f20ce9a8e93e0cd6",
        "checked": "2026-11-02",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  },
  "metadata": {
    "specs": {
      "Manufacturer": "onsemi",
      "Package": "SOIC-8",
      "Category": "Power Management ICs",
      "Pins": "8"
    },
    "appearance": {
      "housing": {
        "quote": "RIO Insulation Resistance at TS, VIO = 500 V 109 Table 3. ABSOLUTE MAXIMUM RATINGS (Note 1)",
        "page": 6,
        "doc": "ds.pdf",
        "material": "ABS"
      },
      "version": 1,
      "datasheet_sha256": "a01719ad55ec6781bcec82bd2c0db8d4f50b268c1e3d56138c3f47a376d54b79"
    }
  },
  "variants": [],
  "sections": [
    "hero",
    "viewers",
    "readme",
    "breadcrumbs",
    "info"
  ],
  "discovery_triggers": [
    "ncv57080cdr2g"
  ],
  "discovery_pitch": "NCV57080CDR2G (onsemi) component page: datasheet pinout, KiCad symbol, footprint and 3D.",
  "author": {
    "name": "Ray",
    "email": "[email protected]"
  },
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "ncv57080cdr2g.kicad_sym",
    "ncv57080cdr2g.kicad_mod",
    "ncv57080cdr2g.glb",
    "ncv57080cdr2g.step",
    "ncv57080cdr2g.lbr",
    "docs/hero.png",
    "docs/ncv57080cdr2g-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "ncv57080cdr2g-hero.glb",
    "ncv57080cdr2g-hero.overlay.json",
    "ncv57080cdr2g-etched.glb"
  ],
  "visibility": {
    "public": true
  }
}