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docs ncv431bvdr2g: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 5d ago
viewers ncv431bvdr2g: viewers · Ray 28d ago
ncv431bvdr2g-etched.fit.json ncv431bvdr2g: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 5d ago
ncv431bvdr2g-etched.glb ncv431bvdr2g: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 5d ago
ncv431bvdr2g-etched.step ncv431bvdr2g: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 5d ago
ncv431bvdr2g.glb Publish 0.1.0 · Ray 28d ago
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README.md ncv431bvdr2g: laser-etched CAD + chip hero (factory 2.0.0 backfill) · Ray 19d ago

NCV431BVDR2G

onsemi · Voltage Reference · SOIC-8

NCV431BVDR2G from onsemi, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 CATHODE passive Cathode (K) of the shunt regulator. Regulated node - sinks 1.0 mA to 100 mA when VKA reaches the programmed value. Absolute max VKA = 37 V; continuous IK rated −100 to +150 mA.
2 ANODE passive Anode (A) of the shunt regulator (return / ground reference). Electrically common to the die-attach flag together with pins 3, 6 and 7; tie all four to the board's low-side/ground plane to realize the enhanced power-dissipation rating of the modified SOIC-8.
3 ANODE passive Anode / die-attach-flag connection. Electrically common with pins 2, 6 and 7 (Anode). Bond to the anode/ground copper for thermal transfer.
4 NC unconnected No internal connection. Leave floating or tie to Anode; do not use for signal routing.
5 NC unconnected No internal connection. Leave floating or tie to Anode; do not use for signal routing.
6 ANODE passive Anode / die-attach-flag connection. Electrically common with pins 2, 3 and 7 (Anode). Bond to the anode/ground copper for thermal transfer.
7 ANODE passive Anode (A) of the shunt regulator. Electrically common with pins 2, 3 and 6 via the die-attach flag; the four anode pins together form the low-side/return terminal.
8 REF input Reference input (R). Internal error amplifier compares this pin against the 2.495 V internal bandgap; drive from a resistor divider from Cathode to program VKA = (1 + R1/R2)·Vref. Iref = 1.1 µA typ (2.0 µA max @ 25 °C); Iref rated −0.05 to +10 mA.

Key specifications

Parameter Value
Manufacturer onsemi
Package SOIC-8
Category Power Management (PMIC)
Pins 8

Ordering variants

Same part, different packaging or reel option.

  • NCV431BVDR2G
  • NCV431BVDR2GTL431BVDR2G
  • NCV431BVDR2GTL431BVDG
  • NCV431BVDMR2G
  • NCV431BVDR2GTL431BVDMR2G
  • NCV431BVDR2GTL431BVPG
  • NCV431BVDR2GTL431BVLPG
  • NCV431BVDR2GTL431BVLPRAG

CAD (KiCad official)

  • Symbol: NCV431BVDR2G
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: ncv431bvdr2g-etched.step / ncv431bvdr2g-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ncv431bvdr2g.step / ncv431bvdr2g.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: onsemi datasheet (None pp, sha256 c82bb95655b732ca, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF