component
NCV4254CPDSTR2G
Public Made by Adomby adom
onsemi Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOIC-8-EP. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
← Commit history
ncv4254cpdstr2g: factory component page (tier=lcsc)
2 files changed
+9308−33
ncv4254cpdstr2g-etched.stepadded+8815@@ -0,0 +1,8815 @@+ISO-10303-21;+HEADER;+FILE_DESCRIPTION(('Open CASCADE Model'),'2;1');+FILE_NAME('Open CASCADE Shape Model','2026-10-19T07:55:44',('Author'),(+ 'Open CASCADE'),'Open CASCADE STEP processor 7.8','Open CASCADE 7.8'+ ,'Unknown');+FILE_SCHEMA(('AUTOMOTIVE_DESIGN { 1 0 10303 214 1 1 1 1 }'));+ENDSEC;+DATA;+#1 = APPLICATION_PROTOCOL_DEFINITION('international standard',+ 'automotive_design',2000,#2);+#2 = APPLICATION_CONTEXT(+ 'core data for automotive mechanical design processes');+#3 = SHAPE_DEFINITION_REPRESENTATION(#4,#10);+#4 = PRODUCT_DEFINITION_SHAPE('','',#5);+#5 = PRODUCT_DEFINITION('design','',#6,#9);+#6 = PRODUCT_DEFINITION_FORMATION('','',#7);+#7 = PRODUCT('Adom.Chip','Adom.Chip','',(#8));+#8 = PRODUCT_CONTEXT('',#2,'mechanical');+#9 = PRODUCT_DEFINITION_CONTEXT('part definition',#2,'design');+#10 = ADVANCED_BREP_SHAPE_REPRESENTATION('',(#11,#15),#4627);+#11 = AXIS2_PLACEMENT_3D('',#12,#13,#14);+#12 = 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page.json+493−33@@ -1,8 +1,11 @@ {+ "schema_version": 1,+ "type": "component", "slug": "ncv4254cpdstr2g",+ "title": "NCV4254CPDSTR2G",+ "brief": "onsemi Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOIC-8-EP. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.", "version": "0.1.0",- "type": "component",- "description": "onsemi Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOIC-8-EP. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+ "license": "CC-BY-SA-4.0", "tags": [ "component", "power management (pmic)",@@ -10,27 +13,6 @@ "factory-2.0.0", "extractor-text" ],- "dependencies": {},- "hero": {- "type": "image",- "path": "docs/hero.png"- },- "files": [- "page.json",- "README.md",- "ncv4254cpdstr2g.kicad_sym",- "ncv4254cpdstr2g.kicad_mod",- "ncv4254cpdstr2g.glb",- "ncv4254cpdstr2g.step",- "ncv4254cpdstr2g.lbr",- "docs/hero.png",- "docs/ncv4254cpdstr2g-datasheet.pdf",- "viewers/symbol.html",- "viewers/footprint.html",- "ncv4254cpdstr2g-hero.glb",- "ncv4254cpdstr2g-hero.overlay.json",- "ncv4254cpdstr2g-etched.glb"- ], "component": { "mpn": "NCV4254CPDSTR2G", "manufacturer": "onsemi",@@ -167,12 +149,12 @@ "origin": "footprint origin = pad-pattern centre", "seat": "z = 0", "extents_mm": [- 6,+ 6.0, 4.9, 1.55 ],- "zmin_mm": 0,- "centre_offset_mm": 0,+ "zmin_mm": -0.0,+ "centre_offset_mm": 0.0, "footprint_binding": "identity", "sha256": "2d6f7e774e8143e3320cbd59eb5be9f3b7864614644e3b072006e1eb05fb7fa6", "checked": "2026-10-19",@@ -186,12 +168,12 @@ "origin": "footprint origin = pad-pattern centre", "seat": "z = 0", "extents_mm": [- 6,+ 6.0, 4.9, 1.55 ],- "zmin_mm": 0,- "centre_offset_mm": 0,+ "zmin_mm": -0.0,+ "centre_offset_mm": 0.0, "footprint_binding": "identity", "sha256": "531457ea6068a686e9e8f01af613bd5adf22a7ec4654ca0309fe6103ea7baef8", "checked": "2026-10-19",@@ -199,10 +181,488 @@ } ] },- "visibility": "public",- "org": "adom",+ "metadata": {+ "specs": {+ "Manufacturer": "onsemi",+ "Package": "SOIC-8-EP",+ "Category": "Power Management (PMIC)",+ "Pins": "9"+ },+ "characteristics": {+ "version": 1,+ "source": "datasheet",+ "datasheet_sha256": "6d682e1e389ebefd0c2f2f16629d4079a565145686bfc707cd63ea559e860082",+ "rows": [+ {+ "name": "Input Voltage DC",+ "symbol": "Vin",+ "kind": "absolute_maximum",+ "unit": "V",+ "min": -20,+ "typ": null,+ "max": 45,+ "conditions": "",+ "source_page": 3,+ "source": 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