component
ncv33172dr2g
Public Made by Adomby adom
onsemi Operational Amplifier, SOIC-8. Datasheet-verified pinout, KiCad symbol/footprint/3D.
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README.mdadded+51@@ -0,0 +1,51 @@+# NCV33172DR2G++**onsemi** · Operational Amplifier · SOIC-8++NCV33172DR2G from onsemi, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | Output 1 | output | Op-amp channel 1 output. All-NPN output stage; typical swing to within ~0.8 V of both rails with a 10 kΩ load; sources typ 5 mA, sinks typ 27 mA (min 15 mA); output short-circuit protected. |+| 2 | Inv. Input 1 | input | Inverting (−) input of op-amp channel 1. High-impedance Darlington PNP input stage; typ input bias current 20 nA, typ differential input resistance 300 MΩ, input capacitance 0.8 pF. |+| 3 | Noninv. Input 1 | input | Non-inverting (+) input of op-amp channel 1. Common-mode range extends from VEE up to (VCC − 1.8 V) at 25 °C; ESD diodes provide input protection on the dual/quad devices. |+| 4 | VEE | power_in | Negative supply / ground. Single-supply operation ties this to GND (VCC = 3.0 V to 44 V); split-supply operation uses ±1.5 V to ±22 V. Absolute-max supply span |VCC| + |VEE| ≤ 44 V. |+| 5 | Noninv. Input 2 | input | Non-inverting (+) input of op-amp channel 2. Same input characteristics as channel 1: CM range VEE to (VCC − 1.8 V), typ IB = 20 nA, 300 MΩ differential input resistance. |+| 6 | Inv. Input 2 | input | Inverting (−) input of op-amp channel 2. High-impedance Darlington PNP input stage; matches channel 1 for offset, bias, and noise characteristics (VIO typ 2.0 mV, en typ 32 nV/√Hz at 1 kHz). |+| 7 | Output 2 | output | Op-amp channel 2 output. Same drive as Output 1: capacitive drive capability 0 pF to 500 pF, GBW 1.8 MHz, SR 2.1 V/µs, channel separation typ 120 dB at 10 kHz. |+| 8 | VCC | power_in | Positive supply rail, 3.0 V to 44 V single-supply or +1.5 V to +22 V split-supply. Per-amplifier quiescent current typ 220 µA at ±15 V (typ 180 µA at +5 V). Decouple to VEE with a low-ESR capacitor placed adjacent to the pin. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | onsemi |+| Package | SOIC-8 |+| Category | Op-amp/Cmp |+| Pins | 8 |++## Ordering variants++- `NCV33172DR2G`+- `NCV33172DR2GDG`+- `NCV33172DR2GVDR2G`+- `NCV33172DR2GVDG`+- `NCV33172DR2GPG`++## CAD (KiCad official)++- Symbol: `NCV33172DR2G`+- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`+- 3D model: SOIC-8 (KiCad packages3D, STEP)++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [onsemi datasheet](https://www.onsemi.com/pdf/datasheet/ncv33172-d.pdf) (None pp, sha256 `f1e9ff0b61491b0b`, retrieved 2026-08-17, tier: manufacturer)+- **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/ncv33172dr2g-datasheet.pdf)
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