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ncv33172dr2g: restore the component block (pinout + model declarations) from this page's own README and symbol

Ray ·59e986f13a ·1mo ago ·parent b05b3eb
1 file changed +75−1
page.json+75−1
@@ -33,5 +33,79 @@   "author": {     "name": "Ray",     "email": "[email protected]"+  },+  "component": {+    "mpn": "NCV33172DR2G",+    "manufacturer": "onsemi",+    "package": "SOIC-8",+    "pin_count": 8,+    "category": "Operational Amplifier",+    "datasheet": "https://www.onsemi.com/pdf/datasheet/ncv33172-d.pdf",+    "parts": {+      "symbol": "ncv33172dr2g.kicad_sym",+      "footprint": "ncv33172dr2g.kicad_mod",+      "model_3d": "ncv33172dr2g-etched.glb",+      "model_3d_plain": "ncv33172dr2g.glb",+      "model_3d_step": "ncv33172dr2g-etched.step",+      "model_3d_step_plain": "ncv33172dr2g.step",+      "lbr": "ncv33172dr2g.lbr"+    },+    "pins": [+      {+        "number": "1",+        "name": "Output 1",+        "type": "output",+        "description": "Op-amp channel 1 output. All-NPN output stage; typical swing to within ~0.8 V of both rails with a 10 kΩ load; sources typ 5 mA, sinks typ 27 mA (min 15 mA); output short-circuit protected."+      },+      {+        "number": "2",+        "name": "Inv. Input 1",+        "type": "input",+        "description": "Inverting (−) input of op-amp channel 1. High-impedance Darlington PNP input stage; typ input bias current 20 nA, typ differential input resistance 300 MΩ, input capacitance 0.8 pF."+      },+      {+        "number": "3",+        "name": "Noninv. Input 1",+        "type": "input",+        "description": "Non-inverting (+) input of op-amp channel 1. Common-mode range extends from VEE up to (VCC − 1.8 V) at 25 °C; ESD diodes provide input protection on the dual/quad devices."+      },+      {+        "number": "4",+        "name": "VEE",+        "type": "power_in",+        "description": "Negative supply / ground. Single-supply operation ties this to GND (VCC = 3.0 V to 44 V); split-supply operation uses ±1.5 V to ±22 V. Absolute-max supply span|VCC|+|VEE|≤ 44 V."+      },+      {+        "number": "5",+        "name": "Noninv. Input 2",+        "type": "input",+        "description": "Non-inverting (+) input of op-amp channel 2. Same input characteristics as channel 1: CM range VEE to (VCC − 1.8 V), typ IB = 20 nA, 300 MΩ differential input resistance."+      },+      {+        "number": "6",+        "name": "Inv. Input 2",+        "type": "input",+        "description": "Inverting (−) input of op-amp channel 2. High-impedance Darlington PNP input stage; matches channel 1 for offset, bias, and noise characteristics (VIO typ 2.0 mV, en typ 32 nV/√Hz at 1 kHz)."+      },+      {+        "number": "7",+        "name": "Output 2",+        "type": "output",+        "description": "Op-amp channel 2 output. Same drive as Output 1: capacitive drive capability 0 pF to 500 pF, GBW 1.8 MHz, SR 2.1 V/µs, channel separation typ 120 dB at 10 kHz."+      },+      {+        "number": "8",+        "name": "VCC",+        "type": "power_in",+        "description": "Positive supply rail, 3.0 V to 44 V single-supply or +1.5 V to +22 V split-supply. Per-amplifier quiescent current typ 220 µA at ±15 V (typ 180 µA at +5 V). Decouple to VEE with a low-ESR capacitor placed adjacent to the pin."+      }+    ],+    "provenance": {+      "rebuilt": "component block rebuilt 2026-10-05 from this page's own README pinout table and .kicad_sym (pins cross-checked), no re-extraction"+    },+    "viewers": {+      "symbol": "viewers/symbol.html",+      "footprint": "viewers/footprint.html"+    }   }-}\ No newline at end of file+}