component
NCV3063DR2G
Public Made by Adomby adom
onsemi DC-DC Converters, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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NCV3063DR2G
onsemi · DC-DC Converters · SOIC-8
NCV3063DR2G from onsemi, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | Switch Collector | output | Internal Darlington switch collector, rated 0 to +40 V with switch current up to 1.5 A. |
| 2 | Switch Emitter | output | Internal Darlington switch emitter, rated −0.6 V to +VCC when the transistor is off. |
| 3 | Timing Capacitor | passive | Timing capacitor (oscillator) node that sets the oscillator frequency, rated −0.2 V to +1.4 V. |
| 4 | GND | power_in | Ground pin for all internal circuits and the reference for all maximum ratings. |
| 5 | Comparator Inverting Input | input | Inverting input of the internal comparator, rated −0.2 V to +VCC. |
| 6 | VCC | power_in | Supply voltage input, rated 0 to +40 V. |
| 7 | Ipk Sense | input | Peak current sense input that monitors the voltage across an external resistor to limit peak current, rated −0.2 V to VCC + 0.2 V with a 200 mV typical current-limit sense voltage. |
| 8 | N.C. | unconnected | Not connected. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | onsemi |
| Package | SOIC-8 |
| Category | Power Management (PMIC) |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| VCC supply voltage (absolute maximum rating) | VCC | 0 | 40 | V | 3 | ||
| Comparator inverting input pin 5 voltage | VCII | -0.2 | V | Printed maximum is +VCC | 3 | ||
| Darlington switch collector pin 1 voltage | VSWC | 0 | 40 | V | 3 | ||
| Darlington switch emitter pin 2 voltage (transistor OFF) | VSWE | -0.6 | V | Transistor OFF; printed maximum is +VCC | 3 | ||
| Darlington switch collector to emitter voltage (pin 1-2) | VSWCE | 0 | 40 | V | 3 | ||
| Darlington switch current | ISW | 1.5 | A | 3 | |||
| Ipk sense pin 7 voltage | VIPK | -0.2 | V | Printed maximum is VCC + 0.2 | 3 | ||
| Timing capacitor pin 3 voltage | VTCAP | -0.2 | 1.4 | V | 3 | ||
| Operating junction temperature range (NCV3063 variant) | TJ | -40 | 125 | °C | NCP3063B, NCV3063 column | 3 | |
| Storage temperature range | TSTG | -65 | 150 | °C | 3 | ||
| Maximum junction temperature | TJ MAX | 150 | °C | 3 | |||
| Oscillator frequency | fOSC | 110 | 150 | 190 | kHz | VPin 5 = 0 V, CT = 2.2 nF, TJ = 25°C | 4 |
| Discharge to charge current ratio | IDISCHG / ICHG | 5.5 | 6 | 6.5 | − | Pin 7 to VCC, TJ = 25°C | 4 |
| Current limit sense voltage | VIPK(Sense) | 165 | 200 | 235 | mV | TJ = 25°C (Note 6) | 4 |
| Darlington switch collector to emitter voltage drop | VSWCE(DROP) | 1 | 1.3 | V | ISW = 1.0 A, Pin 2 to GND, TJ = 25°C (Note 7) | 4 | |
| Collector off-state current | IC(OFF) | 0.01 | 100 | µA | VCE = 40 V | 4 | |
| Threshold voltage tolerance (NCP3063B, NCV3063 row) | VTH | -2 | 2 | % | 4 | ||
| Threshold voltage line regulation | REGLINE | -6 | 2 | 6 | mV | VCC = 5.0 V to 40 V | 4 |
| Input bias current | ICII | -1000 | -100 | 1000 | nA | Vin = Vth | 4 |
| Supply current | ICC | 7 | mA | VCC = 5.0 V to 40 V, CT = 2.2 nF, Pin 7 = VCC, VPin 5 > Vth, Pin 2 = GND, remaining pins open | 4 | ||
| Threshold voltage | VTH | 1.25 | V | TJ = 25°C | 4 | ||
| Thermal shutdown threshold | 160 | °C | 4 | ||||
| Thermal shutdown hysteresis | 10 | °C | 4 | ||||
| Thermal resistance, junction-to-air (SOIC-8) | RJA | 180 | °C/W | 3 | |||
| Thermal resistance, junction-to-case (SOIC-8) | RJC | 45 | °C/W | 3 |
CAD (KiCad official)
- Symbol:
NCV3063DR2G - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
ncv3063dr2g-etched.step/ncv3063dr2g-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ncv3063dr2g.step/ncv3063dr2g.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: onsemi datasheet (19 pp, sha256
706fe13c74fc8342, retrieved 2026-10-17, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# NCV3063DR2G
**onsemi** · DC-DC Converters · SOIC-8
NCV3063DR2G from onsemi, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | Switch Collector | output | Internal Darlington switch collector, rated 0 to +40 V with switch current up to 1.5 A. |
| 2 | Switch Emitter | output | Internal Darlington switch emitter, rated −0.6 V to +VCC when the transistor is off. |
| 3 | Timing Capacitor | passive | Timing capacitor (oscillator) node that sets the oscillator frequency, rated −0.2 V to +1.4 V. |
| 4 | GND | power_in | Ground pin for all internal circuits and the reference for all maximum ratings. |
| 5 | Comparator Inverting Input | input | Inverting input of the internal comparator, rated −0.2 V to +VCC. |
| 6 | VCC | power_in | Supply voltage input, rated 0 to +40 V. |
| 7 | Ipk Sense | input | Peak current sense input that monitors the voltage across an external resistor to limit peak current, rated −0.2 V to VCC + 0.2 V with a 200 mV typical current-limit sense voltage. |
| 8 | N.C. | unconnected | Not connected. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | onsemi |
| Package | SOIC-8 |
| Category | Power Management (PMIC) |
| Pins | 8 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| VCC supply voltage (absolute maximum rating) | VCC | 0 | | 40 | V | | 3 |
| Comparator inverting input pin 5 voltage | VCII | -0.2 | | | V | Printed maximum is +VCC | 3 |
| Darlington switch collector pin 1 voltage | VSWC | 0 | | 40 | V | | 3 |
| Darlington switch emitter pin 2 voltage (transistor OFF) | VSWE | -0.6 | | | V | Transistor OFF; printed maximum is +VCC | 3 |
| Darlington switch collector to emitter voltage (pin 1-2) | VSWCE | 0 | | 40 | V | | 3 |
| Darlington switch current | ISW | | | 1.5 | A | | 3 |
| Ipk sense pin 7 voltage | VIPK | -0.2 | | | V | Printed maximum is VCC + 0.2 | 3 |
| Timing capacitor pin 3 voltage | VTCAP | -0.2 | | 1.4 | V | | 3 |
| Operating junction temperature range (NCV3063 variant) | TJ | -40 | | 125 | °C | NCP3063B, NCV3063 column | 3 |
| Storage temperature range | TSTG | -65 | | 150 | °C | | 3 |
| Maximum junction temperature | TJ MAX | | | 150 | °C | | 3 |
| Oscillator frequency | fOSC | 110 | 150 | 190 | kHz | VPin 5 = 0 V, CT = 2.2 nF, TJ = 25°C | 4 |
| Discharge to charge current ratio | IDISCHG / ICHG | 5.5 | 6 | 6.5 | − | Pin 7 to VCC, TJ = 25°C | 4 |
| Current limit sense voltage | VIPK(Sense) | 165 | 200 | 235 | mV | TJ = 25°C (Note 6) | 4 |
| Darlington switch collector to emitter voltage drop | VSWCE(DROP) | | 1 | 1.3 | V | ISW = 1.0 A, Pin 2 to GND, TJ = 25°C (Note 7) | 4 |
| Collector off-state current | IC(OFF) | | 0.01 | 100 | µA | VCE = 40 V | 4 |
| Threshold voltage tolerance (NCP3063B, NCV3063 row) | VTH | -2 | | 2 | % | | 4 |
| Threshold voltage line regulation | REGLINE | -6 | 2 | 6 | mV | VCC = 5.0 V to 40 V | 4 |
| Input bias current | ICII | -1000 | -100 | 1000 | nA | Vin = Vth | 4 |
| Supply current | ICC | | | 7 | mA | VCC = 5.0 V to 40 V, CT = 2.2 nF, Pin 7 = VCC, VPin 5 > Vth, Pin 2 = GND, remaining pins open | 4 |
| Threshold voltage | VTH | | 1.25 | | V | TJ = 25°C | 4 |
| Thermal shutdown threshold | | | 160 | | °C | | 4 |
| Thermal shutdown hysteresis | | | 10 | | °C | | 4 |
| Thermal resistance, junction-to-air (SOIC-8) | RJA | | 180 | | °C/W | | 3 |
| Thermal resistance, junction-to-case (SOIC-8) | RJC | | 45 | | °C/W | | 3 |
## CAD (KiCad official)
- Symbol: `NCV3063DR2G`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files: `ncv3063dr2g-etched.step` / `ncv3063dr2g-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `ncv3063dr2g.step` / `ncv3063dr2g.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [onsemi datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588883801409785856) (19 pp, sha256 `706fe13c74fc8342`, retrieved 2026-10-17, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/ncv3063dr2g-datasheet.pdf)