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NCV2951CDR2G

Public Made by Adom

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onsemi Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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NCV2951CDR2G

onsemi · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOIC-8

NCV2951CDR2G from onsemi, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 Output power_out Regulated output, 5.0 V fixed (or adjustable) at up to 100 mA, requiring a 1.0 µF output capacitor for stability.
2 Sense input Sense input to the error amplifier/internal divider, connected to the output for the fixed 5.0 V option.
3 Shutdown input Logic level shutdown input that turns the regulator output off or on.
4 GND power_in Ground.
5 Error Output output Error output signalling an out-of-regulation condition, usable as a microprocessor power-on reset.
6 VO Tap passive Tap of the internal resistor divider used to program the output voltage from 1.25 V to 29 V.
7 Feedback input Direct access to the error amplifier feedback input for programming the output voltage from 1.25 V to 29 V.
8 Input power_in Unregulated DC or battery supply input to the regulator.

Key specifications

Parameter Value
Manufacturer onsemi
Package SOIC-8
Category Power Management (PMIC)
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Output Voltage, 5.0 V version (C variant), Vin = 6.0 V, IO = 100 µA, TA = 25°C VO 4.95 5 5.05 V Vin = 6.0 V, IO = 100 µA, TA = 25°C 4
Output Voltage, 5.0 V version (C variant), TA = −40 to +125°C VO 4.9 5.1 V Vin = 6.0 V, IO = 100 µA, TA = −40 to +125°C 4
Output Voltage, 5.0 V version (C variant), line and load VO 4.88 5.12 V Vin = 6.0 to 30 V, IO = 100 µA to 100 mA, TA = −40 to +125°C 4
Line Regulation (C variant) Regline 0.08 0.2 % Vin = VO(nom) +1.0 V to 30 V 5
Load Regulation (C variant) Regload 0.13 0.2 % IO = 100 µA to 100 mA 5
Dropout Voltage VI − VO 30 80 mV IO = 100 µA 5
Dropout Voltage VI − VO 350 450 mV IO = 100 mA 5
Supply Bias Current ICC 93 120 µA IO = 100 µA 5
Supply Bias Current ICC 4 12 mA IO = 100 mA 5
Dropout Supply Bias Current ICCdropout 110 170 µA Vin = VO(nom) − 0.5 V, IO = 100 µA (Note 10) 5
Current Limit (VO Shorted to Ground) ILimit 220 300 mA VO shorted to ground 5
Thermal Regulation Regthermal 0.05 0.2 %/W 5
Reference Voltage (C variant), TA = 25°C Vref 1.21 1.235 1.26 V TA = 25°C 5
Reference Voltage (C variant), TA = −40 to +125°C Vref 1.2 1.27 V TA = −40 to +125°C 5
Reference Voltage (C variant), load and input range Vref 1.185 1.285 V IO = 100 µA to 100 mA, Vin = 23 to 30 V 5
Feedback Pin Bias Current IFB 15 40 nA 5
Error Comparator Output Leakage Current Ilkg 0.01 1 µA VOH = 30 V 5
Error Comparator Output Low Voltage VOL 150 250 mV Vin = 4.5 V, IOL = 400 µA 5
Upper Threshold Voltage Vthu 40 45 mV Vin = 6.0 V 5
Lower Threshold Voltage Vthl 60 95 mV Vin = 6.0 V 5
Shutdown Input Logic Voltage, Logic “0” (Regulator On) Vshtdn 0 0.7 V Regulator On 5
Shutdown Input Logic Voltage, Logic “1” (Regulator Off) Vshtdn 2 30 V Regulator Off 5
Shutdown Pin Input Current Ishtdn 35 50 µA Vshtdn = 2.4 V 5
Shutdown Pin Input Current Ishtdn 450 600 µA Vshtdn = 30 V 5
Regulator Output Current in Shutdown Mode Ioff 3 10 µA Vin = 30 V, Vshtdn = 2.0 V, VO = 0, Pin 6 connected to Pin 7 5
Input Voltage VCC 30 V 3
Peak Transient Input Voltage VCC 32 V t < 300 ms 3
Feedback Input Voltage Vfb -1.5 30 V 3
Shutdown Input Voltage Vsd -0.3 30 V 3
Error Comparator Output Voltage Verr -0.3 30 V 3
Maximum Die Junction Temperature Range TJ 150 °C 3
Storage Temperature Range Tstg -65 150 °C 3
Operating Ambient Temperature Range TA -40 125 °C 3
Thermal Resistance, Junction-to-Ambient (SOIC-8) RJA 180 °C/W Case 751 (SOIC−8), D Suffix 3
Thermal Resistance, Junction-to-Case (SOIC-8) RJC 45 °C/W Case 751 (SOIC−8), D Suffix 3

CAD (KiCad official)

  • Symbol: NCV2951CDR2G
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: ncv2951cdr2g-etched.step / ncv2951cdr2g-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ncv2951cdr2g.step / ncv2951cdr2g.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: onsemi datasheet (26 pp, sha256 7e13561adb1414fd, retrieved 2026-10-17, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF