component
NCP81151MNTBG
Public Made by Adomby adom
onsemi Gate Drivers, DFN-8-EP(2x2). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.md+107docs/hero.pngdocs/ncp81151mntbg-datasheet.pdf+3468ncp81151mntbg-etched.glbncp81151mntbg-hero.glbncp81151mntbg-hero.overlay.json+282ncp81151mntbg.glbncp81151mntbg.kicad_mod+295ncp81151mntbg.kicad_sym+49ncp81151mntbg.lbr+129ncp81151mntbg.step+2490package.json+200page.json+206viewers/footprint.html+1viewers/symbol.html+1README.mdadded+107@@ -0,0 +1,107 @@+# NCP81151MNTBG++**onsemi** · Gate Drivers · DFN-8-EP(2x2)++NCP81151MNTBG from onsemi, in a DFN-8-EP(2x2). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | BST | power_in | Floating bootstrap supply pin for the high-side gate driver, with the bootstrap capacitor connected between this pin and SW. |+| 2 | PWM | input | Three-state PWM control input: Low enables the low-side FET, Mid enables diode emulation, and High enables the high-side FET. |+| 3 | EN | input | Three-state enable input: High enables the gate driver, Low disables it, and Mid forces diode mode with both DRVH and DRVL low. |+| 4 | VCC | power_in | Main supply input with a 4.5 V to 5.5 V operating range, bypassed to ground with a capacitor connected from this pin. |+| 5 | DRVL | output | Low-side gate drive output that connects to the gate of the low-side MOSFET. |+| 6 | GND | power_in | Bias and reference ground to which all signals are referenced, to be connected to a local ground plane. |+| 7 | SW | passive | Switch node that connects to the source of the high-side MOSFET and the drain of the low-side MOSFET, and serves as the bootstrap supply return. |+| 8 | DRVH | output | High-side gate drive output that connects to the gate of the high-side MOSFET. |+| 9 | FLAG | passive | Thermal flag (exposed pad) with no electrical connection to the IC, to be connected to the ground plane for heat dissipation. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | onsemi |+| Package | DFN-8-EP(2x2) |+| Category | Motor Driver ICs |+| Pins | 9 |++## Electrical characteristics++Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).++| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |+|---|---|---|---|---|---|---|---|+| Main Supply Voltage Input | VCC | -0.3 | | 6.5 | V | | 4 |+| Bootstrap Supply Voltage | BST | | | 35 | V | wrt GND | 4 |+| Bootstrap Supply Voltage | BST | | | 40 | V | 50 ns wrt GND | 4 |+| Bootstrap Supply Voltage | BST | | | 6.5 | V | wrt SW | 4 |+| Bootstrap Supply Voltage | BST | | | 7.7 | V | < 50 ns wrt SW | 4 |+| Bootstrap Supply Voltage | BST | -0.3 | | | V | wrt SW | 4 |+| Switching Node (Bootstrap Supply Return) | SW | | | 35 | V | | 4 |+| Switching Node (Bootstrap Supply Return) | SW | | | 40 | V | 50 ns | 4 |+| Switching Node (Bootstrap Supply Return) | SW | -5 | | | V | | 4 |+| Switching Node (Bootstrap Supply Return) | SW | -10 | | | V | 200 ns | 4 |+| High Side Driver Output | DRVH | -0.3 | | | V | wrt SW | 4 |+| High Side Driver Output | DRVH | -2 | | | V | < 200 ns wrt SW | 4 |+| Low Side Driver Output | DRVL | -0.3 | | | V | DC | 4 |+| Low Side Driver Output | DRVL | -5 | | | V | < 200 ns | 4 |+| DRVH and DRVL Control Input | PWM | -0.3 | | 6.5 | V | | 4 |+| Enable Pin | EN | -0.3 | | 6.5 | V | | 4 |+| Ground | GND | 0 | | 0 | V | | 4 |+| Operating Junction Temperature Range | TJ | -40 | | 150 | °C | Note 2 | 4 |+| Operating Ambient Temperature Range | TA | -40 | | 100 | °C | | 4 |+| Maximum Storage Temperature Range | TSTG | -55 | | 150 | °C | | 4 |+| VCC Operation Voltage | | 4.5 | | 5.5 | V | | 5 |+| VCC Start Threshold | | 3.8 | 4.35 | 4.5 | V | | 5 |+| VCC UVLO Hysteresis | | 150 | 200 | 250 | mV | | 5 |+| Shutdown Mode | | 11 | | 20 | A | ICC + IBST, EN = GND | 5 |+| PWM Mid-State | | 1.3 | | 2.7 | V | | 5 |+| Bootstrap Diode Forward Voltage | | 0.1 | 0.4 | 0.6 | V | VCC = 5 V, forward bias current = 2 mA | 5 |+| Output Impedance, Sourcing Current (High Side) | | 0.9 | | 1.7 | | VBST−VSW = 5 V | 5 |+| Output Impedance, Sinking Current (High Side) | | 0.7 | | 1.7 | | VBST−VSW = 5 V | 5 |+| DRVH Rise Time | trDRVH | 16 | | 25 | ns | VCC = 5 V, 3 nF load, VBST−VSW = 5 V | 5 |+| DRVH Fall Time | tfDRVH | 11 | | 18 | ns | VCC = 5 V, 3 nF load, VBST−VSW = 5 V | 5 |+| DRVH Turn−Off Propagation Delay | tpdlDRVH | 10 | | 30 | ns | CLOAD = 3 nF | 5 |+| DRVH Turn−On Propagation Delay | tpdhDRVH | 10 | | 40 | ns | CLOAD = 3 nF | 5 |+| Output Impedance, Sourcing Current (Low Side) | | 0.9 | | 1.7 | | | 5 |+| Output Impedance, Sinking Current (Low Side) | | 0.4 | | 0.8 | | | 5 |+| DRVL Rise Time | trDRVL | 16 | | 25 | ns | CLOAD = 3 nF | 5 |+| DRVL Fall Time | tfDRVL | 11 | | 15 | ns | CLOAD = 3 nF | 5 |+| DRVL Turn−Off Propagation Delay | tpdlDRVL | 10 | | 30 | ns | CLOAD = 3 nF | 5 |+| DRVL Turn−On Propagation Delay | tpdhDRVL | 5 | | 25 | ns | CLOAD = 3 nF | 5 |+| EN Input Voltage Mid | | 1.35 | | 1.8 | V | | 6 |+| Input bias current | | -1 | | 1 | A | | 6 |+| Propagation Delay Time | | 20 | | 40 | ns | | 6 |+| Normal Mode | | | 4.7 | | mA | ICC + IBST, EN = 5 V, PWM = OSC | 5 |+| Standby Current (PWM Low) | | | 0.9 | | mA | ICC + IBST, EN = HIGH, PWM = LOW, No loading on DRVH & DRVL | 5 |+| Standby Current (PWM High) | | | 1.1 | | mA | ICC + IBST, EN = HIGH, PWM = HIGH, No loading on DRVH & DRVL | 5 |+| PWM Input High | | | 3.4 | | V | | 5 |+| PWM Input Low | | | 0.7 | | V | | 5 |+| ZCD Blanking Timer | | | 350 | | ns | | 5 |+| SW Pulldown Resistance | | | 45 | | k | SW to PGND | 5 |+| DRVH Pulldown Resistance | | | 45 | | k | DRVH to SW, BST−SW = 0 V | 5 |+| DRVL Pulldown Resistance | | | 45 | | k | DRVL to PGND, VCC = PGND | 5 |+| EN Input Voltage High | | | 3.3 | | V | | 6 |+| EN Input Voltage Low | | | 0.6 | | V | | 6 |+| SW Node Leakage Current | | | 20 | | A | | 6 |+| Zero Cross Detection Threshold Voltage | | | -6 | | mV | | 6 |+| Thermal Characteristic, QFN Package | RJA | | 119 | | °C/W | Note 1: 1 in2 Cu, 1 oz. thickness | 4 |++## CAD (KiCad official)++- Symbol: `NCP81151MNTBG`+- Footprint: `Package_DFN_QFN:DFN-8-1EP_2x2mm_P0.5mm_EP0.6x1.2mm`+- 3D model: DFN-8-EP(2x2) (KiCad packages3D, STEP)+- 3D model files: `ncp81151mntbg-etched.step` / `ncp81151mntbg-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `ncp81151mntbg.step` / `ncp81151mntbg.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [onsemi datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588876868220674048) (10 pp, sha256 `0203805c369893c5`, retrieved 2026-10-16, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/ncp81151mntbg-datasheet.pdf)
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docs/ncp81151mntbg-datasheet.pdfadded+3468@@ -0,0 +1,3468 @@+%PDF-1.4+%����+1 0 obj+<<+/Type /Catalog+/Version /1.6+/Pages 2 0 R+/AcroForm 3 0 R+/Metadata 4 0 R+/PageLabels 5 0 R+>>+endobj+6 0 obj+<<+/Author (ON Semiconductor)+/CreationDate (D:20150421115239-07'00')+/Creator (BroadVision, Inc.)+/ModDate (D:20200908154128+02'00')+/Producer (Acrobat Distiller 10.0.0 \(Windows\))+/Subject <546865204E435038313135312069732061206869676820706572666F726D616E6365206475616C204D4F534645542067617465206472697665720D0A6F7074696D697A656420746F20647269766520746865206761746573206F6620626F746820686967688A7369646520616E64206C6F778A7369646520706F7765720D0A4D4F534645547320696E20612073796E6368726F6E6F7573206275636B20636F6E7665727465722E2049742063616E20647269766520757020746F2033206E460D0A6C6F616420776974682061203235206E732070726F7061676174696F6E2064656C617920616E64203230206E73207472616E736974696F6E2074696D652E0D0A416461707469766520616E74698A63726F73738A636F6E64756374696F6E20616E6420706F77657220736176696E67206F7065726174696F6E20636972637569740D0A63616E2070726F766964652061206C6F7720737769746368696E67206C6F737320616E64206869676820656666696369656E637920736F6C7574696F6E20666F720D0A6E6F7465626F6F6B2073797374656D732E0D0A5468652055564C4F2066756E6374696F6E2067756172616E7465657320746865206F75747075747320617265206C6F77207768656E2074686520737570706C790D0A766F6C74616765206973206C6F772E>+/Title (NCP81151 - MOSFET Driver, VR12.5 Compatible Synchronous Buck)+>>+endobj+2 0 obj+<<+/Type /Pages+/Kids [7 0 R 8 0 R 9 0 R 10 0 R 11 0 R 12 0 R 13 0 R 14 0 R 15 0 R 16 0 R]+/Count 10+>>+endobj+3 0 obj+<<+/DA (/Helv 0 Tf 0 g )+/DR 17 0 R+/Fields []+>>+endobj+4 0 obj+<<+/Length 4371+/Subtype /XML+/Type /Metadata+>>+stream +<?xpacket begin="" id="W5M0MpCehiHzreSzNTczkc9d"?>+<x:xmpmeta xmlns:x="adobe:ns:meta/" x:xmptk="Adobe XMP Core 5.6-c017 91.164464, 2020/06/15-10:20:05 ">+ <rdf:RDF xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#">+ <rdf:Description rdf:about=""+ xmlns:xmp="http://ns.adobe.com/xap/1.0/"+ xmlns:pdf="http://ns.adobe.com/pdf/1.3/"+ xmlns:dc="http://purl.org/dc/elements/1.1/"+ xmlns:xmpMM="http://ns.adobe.com/xap/1.0/mm/"+ xmlns:illustrator="http://ns.adobe.com/illustrator/1.0/">+ <xmp:CreateDate>2015-04-21T11:52:39-07:00</xmp:CreateDate>+ <xmp:CreatorTool>BroadVision, Inc.</xmp:CreatorTool>+ <xmp:ModifyDate>2020-09-08T15:41:28+02:00</xmp:ModifyDate>+ <xmp:MetadataDate>2020-09-08T15:41:28+02:00</xmp:MetadataDate>+ <pdf:Producer>Acrobat Distiller 10.0.0 (Windows)</pdf:Producer>+ <dc:format>application/pdf</dc:format>+ <dc:title>+ <rdf:Alt>+ <rdf:li xml:lang="x-default">NCP81151 - MOSFET Driver, VR12.5 Compatible Synchronous Buck</rdf:li>+ </rdf:Alt>+ </dc:title>+ <dc:creator>+ <rdf:Seq>+ <rdf:li>ON Semiconductor</rdf:li>+ </rdf:Seq>+ </dc:creator>+ <dc:description>+ <rdf:Alt>+ <rdf:li xml:lang="x-default">The NCP81151 is a high performance dual MOSFET gate driver
optimized to drive the gates of both high−side and low−side power
MOSFETs in a synchronous buck converter. It can drive up to 3 nF
load with a 25 ns propagation delay and 20 ns transition time.
Adaptive anti−cross−conduction and power saving operation circuit
can provide a low switching loss and high efficiency solution for
notebook systems.
The UVLO function guarantees the outputs are low when the supply
voltage is low.</rdf:li>+ </rdf:Alt>+ </dc:description>+ <xmpMM:DocumentID>uuid:ed49fba6-f7d0-49cb-925f-f98f03948ecf</xmpMM:DocumentID>+ <xmpMM:InstanceID>uuid:df3ae0d1-cf9e-429e-978c-f58665217f21</xmpMM:InstanceID>+ <illustrator:StartupProfile>Print</illustrator:StartupProfile>+ </rdf:Description>+ </rdf:RDF>+</x:xmpmeta>+ + + + + + + + + + + + + + + + + + + + + +<?xpacket end="w"?> +endstream+endobj+5 0 obj+<<+/Nums [8 18 0 R 9 19 0 R]+>>+endobj+7 0 obj+<<+/Annots [20 0 R]+/Contents [21 0 R 22 0 R 23 0 R 24 0 R 25 0 R 26 0 R 27 0 R 28 0 R]+/CropBox [0.0 0.0 612.0 792.0]+/MediaBox [0.0 0.0 612.0 792.0]+/Parent 2 0 R+/Resources 29 0 R+/Rotate 0+/Type /Page+>>+endobj+8 0 obj+<<+/Annots [30 0 R]+/Contents 31 0 R+/CropBox [0.0 0.0 612.0 792.0]+/MediaBox [0.0 0.0 612.0 792.0]+/Parent 2 0 R+/Resources 32 0 R+/Rotate 0+/Type /Page+>>+endobj+9 0 obj+<<+/Annots [33 0 R]+/Contents 34 0 R+/CropBox [0.0 0.0 612.0 792.0]+/MediaBox [0.0 0.0 612.0 792.0]+/Parent 2 0 R+/Resources 35 0 R+/Rotate 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