component
NCP81074AMNTBG
Public Made by Adomby adom
onsemi Gate Drivers, DFN-8-EP(2x2). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
| Name | Last updated |
|---|---|
| docs | 9d ago |
| viewers | 9d ago |
| ncp81074amntbg-etched.glb | 9d ago |
| ncp81074amntbg-etched.step | 9d ago |
| ncp81074amntbg-hero.glb | 9d ago |
| ncp81074amntbg-hero.overlay.json | 9d ago |
| ncp81074amntbg.glb | 9d ago |
| ncp81074amntbg.kicad_mod | 9d ago |
| ncp81074amntbg.kicad_sym | 9d ago |
| ncp81074amntbg.lbr | 9d ago |
| ncp81074amntbg.step | 9d ago |
| package.json | 9d ago |
| page.json | 9d ago |
| README.md | 9d ago |
NCP81074AMNTBG
onsemi · Gate Drivers · DFN-8-EP(2x2)
NCP81074AMNTBG from onsemi, in a DFN-8-EP(2x2). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | IN+ | input | Non-inverting input with logic-compatible threshold and hysteresis; if not used it should be connected to either VDD or GND and must not be left unconnected. |
| 2 | GND | power_in | Common ground that should be connected very closely to the source of the power MOSFET. |
| 3 | GND | power_in | Common ground that should be connected very closely to the source of the power MOSFET. |
| 4 | OUTL | output | Sink pin that connects to the gate of the MOSFET. |
| 5 | OUTH | output | Source pin that connects to the gate of the MOSFET. |
| 6 | VDD | power_in | Power supply input pin; VDD supply range is 4.5 V to 20 V per the recommended operating conditions. |
| 7 | VDD | power_in | Power supply input pin; VDD supply range is 4.5 V to 20 V per the recommended operating conditions. |
| 8 | IN− | input | Inverting input with logic-compatible threshold and hysteresis; if not used it should be connected to either VDD or GND and must not be left unconnected. |
| 9 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | onsemi |
| Package | DFN-8-EP(2x2) |
| Category | Motor Driver ICs |
| Pins | 9 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| VDD Under Voltage Lockout (rising) | VCCR | 3.7 | 3.9 | 4.1 | V | VDD rising | 4 |
| VDD Under Voltage Lockout (falling) | VCCF | 3.4 | 3.6 | 3.8 | V | VDD falling | 4 |
| Operating Current (no switching) | IDD | 1.2 | 2 | mA | no switching | 4 | |
| NCP81074A High Threshold | VthH | 1.9 | 2.1 | 2.3 | V | Input rising from logic low | 4 |
| NCP81074A Low Threshold | VthL | 1.1 | 1.3 | 1.5 | V | Input falling from logic high | 4 |
| Output Resistance High | ROH | 0.4 | 0.8 | Ω | IOUT = −10 mA | 4 | |
| Output Resistance Low | ROL | 0.4 | 0.8 | Ω | IOUT = +10 mA | 4 | |
| Propagation Delay Time Low to High (IN Rising to OUT) | td1 | 15 | 27 | ns | CLoad = 1.8 nF | 5 | |
| Propagation Delay Time High to Low (IN Falling to OUT) | td2 | 15 | 27 | ns | CLoad = 1.8 nF | 5 | |
| Rise Time | tr | 4 | 7 | ns | CLoad = 1.8 nF | 5 | |
| Fall Time | tf | 4 | 7 | ns | CLoad = 1.8 nF | 5 | |
| Supply Voltage | VDD | -0.3 | 24 | V | 3 | ||
| Output Current (DC) | Iout_dc | 0.6 | A | 3 | |||
| Reverse Current (Pulse<1 s) | 10 | A | Pulse < 1 s | 3 | |||
| Output Current (Pulse<0.5 s) | Iout_pulse | 10 | A | Pulse < 0.5 s | 3 | ||
| Input Voltage IN+, IN− | -6 | 24 | V | 3 | |||
| Output Voltages OUTH, OUTL | -0.3 | V | max printed as VDD + 0.3 V | 3 | |||
| Output Voltages (Pulse<0.5 s) OUTH, OUTL | -3 | V | Pulse < 0.5 s; max printed as VDD + 3.0 V | 3 | |||
| Junction Operation Temperature | TJ | -40 | 150 | °C | 3 | ||
| Storage Temperature | Tstg | -65 | 160 | °C | 3 | ||
| Electrostatic Discharge (Human Body Model) | 4000 | V | Human body model, HBM | 3 | |||
| Electrostatic Discharge (Charge Device Model) | 1000 | V | Charge device model, CDM | 3 | |||
| OUT Latch-up Protection | 500 | mA | 3 | ||||
| VDD supply Voltage | VDD | 4.5 | 20 | V | 4 | ||
| IN+, IN− input voltages | -5 | 20 | V | 4 | |||
| Junction Temperature Range | TJ | -40 | 140 | °C | 4 | ||
| VDD Under Voltage Lockout (hysteresis) | VCCH | 300 | mV | 4 | |||
| NCP81074A Input Signal Hysteresis | VIN_HYS | 0.8 | V | 4 | |||
| IN− Pull-up Resistor | Rin− | 200 | kΩ | 4 | |||
| IN+ Pull-Down Resistor | Rin+ | 200 | kΩ | 4 | |||
| Peak Source Current | ISource | 10 | A | OUT = GND, 200 ns Pulse | 4 | ||
| Miller Plateau Source Current | ISource | 7 | A | OUT = 5.0 V, 200 ns Pulse | 4 | ||
| Peak Sink Current | ISink | 10 | A | OUT = VDD, 200 ns Pulse | 4 | ||
| Miller Plateau Sink Current | ISink | 7 | A | OUT = 5.0 V, 200 ns Pulse | 4 | ||
| Thermal Resistance Junction-to-Ambient, DFN-8 2x2 | Theta JA | 80.3 | C/W | 4 | |||
| Thermal Resistance Junction-to-Case, DFN-8 2x2 | Theta JC | 11.9 | C/W | 4 |
CAD (KiCad official)
- Symbol:
NCP81074AMNTBG - Footprint:
Package_DFN_QFN:DFN-8-1EP_2x2mm_P0.5mm_EP0.6x1.2mm - 3D model: DFN-8-EP(2x2) (KiCad packages3D, STEP)
- 3D model files:
ncp81074amntbg-etched.step/ncp81074amntbg-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ncp81074amntbg.step/ncp81074amntbg.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: onsemi datasheet (14 pp, sha256
4e73867fd28741bf, retrieved 2026-10-17, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).