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NCP5230MNTWG

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onsemi DC-DC Converters, QFN-16-EP(3x3). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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NCP5230MNTWG

onsemi · DC-DC Converters · QFN-16-EP(3x3)

NCP5230MNTWG from onsemi, in a QFN-16-EP(3x3). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VCCP power_in Power supply for the bottom gate MOSFET drivers; range 4.5 V to 13.2 V, UVLO start threshold 4.2 V.
2 LG output Bottom gate MOSFET driver output pin.
3 LX passive Switch node (bootstrap supply return) used for zero current detection and as the top driver reference.
4 BOOT power_in Supply rail for the floating top gate driver; 35 V max wrt GND and 15 V max wrt LX.
5 UG output Top gate MOSFET driver output pin.
6 PGOOD output Open-drain power good output, released after soft-start with 3 clock delay while the VSEN voltage is within specification.
7 SYNC input Synchronization input; controller synchronizes on the falling edge of a square wave applied here, short to GND if not used.
8 COMP output Output of the error amplifier.
9 FB input Inverting input to the error amplifier, regulated to the 0.8 V reference.
10 VSEN input Output voltage sense input used for power good and overvoltage monitoring.
11 FBG input Remote ground sense input.
12 CSN/VO input Inductor differential current sense inverting input.
13 CSP input Inductor differential current sense non-inverting input.
14 ROSC/EN input Programs the switching frequency (100 kHz to 1 MHz, 200 kHz when open); pulling low with less than 10 kOhm disables the device.
15 VCC power_in Supply rail for the controller internal circuitry; range 4.5 V to 13.2 V, UVLO start threshold 4.50 V.
16 GND power_in Ground reference.
17 THERMAL PAD power_in Exposed pad connected to the silicon substrate for thermal contact with the PCB; connect to the GND plane.

Key specifications

Parameter Value
Manufacturer onsemi
Package QFN-16-EP(3x3)
Category Power Management ICs
Pins 17

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
VCC Voltage Range VCC 4.5 13.2 V 4
VCCP Voltage Range VCCP 4.5 13.2 V 4
dV/dt on VCC -10 10 V/µs Note 1 4
dV/dt on VCCP -10 10 V/µs Note 1 4
VCC Operating Current 5 mA VCC = 5 V / 12 V, EN = High 4
VCC Supply Current 400 uA VCC = 5 V / 12 V, EN = Low 4
VCCP Operating Current 3.5 5 mA UG and LG Open, VCCP = 5 V / 12 V, EN = High 4
VCCP Supply Current 200 µA VCCP = 5 V / 12 V, EN = Low 4
Output Voltage Accuracy -0.5 0.5 % Vout to FBG excluding external resistor divider tolerance 4
Open Loop Unity Gain Bandwidth 15 18 MHz Note 1 4
Common Mode Input Voltage Range -0.3 3.5 V VCC ≤ 7.5 V 4
Common Mode Input Voltage Range -0.3 5.5 V VCC > 7.5 V 4
Switching Frequency Accuracy -10 10 % ROSC open 5
Minimum Turn Off Time (LG on) 250 350 450 ns Fsw = 200 kHz, OSC open 5
Maximum Duty Cycle 80 95 % OSC/EN = OPEN 5
First Over Current Threshold 17 20 23 mV CSP−CSN, 4xMasking 5
OVP Threshold 117 125 130 % VSEN rising above 1.25 * Vref 5
UVP Threshold 70 75 80 % VSEN falling below 0.75 * Vref 5
Unlatched Overvoltage Threshold 40 50 60 % Vth_disoff with respect to 0.5 Vref 5
Negative LX detection voltage Vbdls 150 300 450 mV 5
Positive LX detection voltage Vbdhs 0.2 0.5 1 V 5
Vth adjustable Range -16 0 15 mV Note 1 5
RH_TG Output Resistance, Sourcing RH_TG 2.5 5 Ω VBOOT − VLX = 12 V, Cload = 3 nF 6
RH_TG Output Resistance, Sinking RH_TG 2 2.5 Ω VBOOT − VLX = 12V 6
TpdhDRVH Propagation Delay TpdhDRVH 15 30 ns Driving High, CLOAD = 3 nF, VCC = 12 V, VCCP =12 V 6
RH_BG Output Resistance, Sourcing RH_BG 2 3 Ω VLX = GND, Cload = 3 nF 6
RL_BG Output Resistance, Sinking RL_BG 1 1.5 Ω VLX = VCC 6
TpdhDRVL Propagation Delay TpdhDRVL 10 20 35 ns Driving High, CLOAD = 3 nF, VCCP = 12 V 6
Thermal Shutdown Tsd 150 180 °C Note 1 6
Controller Power Supply Voltage VCC, VCCP -0.3 15 V to GND 3
Boost Supply Voltage BOOT -0.3 35 V wrt/GND; 40 V <100 ns 3
Switching Node LX -5 35 V 40 V <100 ns; −10 V <200 ns 3
Low-Side Driver Output LG -0.3 15 V −5 V < 200 ns 3
All Other Pins -0.3 6 V −1 V < 1 s 3
PGOOD PGOOD -0.3 7 V −1 V < 1 s 3
SYNC SYNC -0.3 7 V −1 V < 1 s 3
Current Sense Amplifier CSP, CSN/VO -0.3 10 V VCC = 12 V; −1 V < 1 s 3
Thermal Resistance, Junction-to-Ambient RθJA 60 °C/W 4
Thermal Resistance, Junction-to-Case RθJC 18 °C/W 4
Operating Junction Temperature Range TJ 0 125 °C 4
Operating Ambient Temperature Range TA 0 85 °C 4
Storage Temperature Range TSTG -55 150 °C 4
Internal Reference Voltage VREF 0.8 V 4

CAD (KiCad official)

  • Symbol: NCP5230MNTWG
  • Footprint: Package_DFN_QFN:QFN-16-1EP_3x3mm_P0.5mm_EP1.7x1.7mm
  • 3D model: QFN-16-EP(3x3) (KiCad packages3D, STEP)
  • 3D model files: ncp5230mntwg-etched.step / ncp5230mntwg-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ncp5230mntwg.step / ncp5230mntwg.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: onsemi datasheet (13 pp, sha256 f39b99b6d49d12dd, retrieved 2026-10-27, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF