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NCP51530BDR2G

Public Made by Adom

by adom

onsemi Gate Drivers, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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NCP51530BDR2G

onsemi · Gate Drivers · SOIC-8

NCP51530BDR2G from onsemi, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 HIN input High side logic input (TTL/CMOS compatible for 3.3 V or 5 V logic) with a typical 1.3 V Schmitt hysteresis, an internal pulldown of 175 kΩ typical, and a recommended input range of GND to VCC−2 V.
2 LIN input Low side logic input (TTL/CMOS compatible for 3.3 V or 5 V logic) with a typical 1.3 V Schmitt hysteresis, an internal pulldown of 175 kΩ typical, and a recommended input range of GND to VCC−2 V.
3 GND power_in Ground reference for the device; all voltages in the datasheet are referenced to this pin.
4 LO output Low side gate drive output with 3.5 A peak source and 3 A peak sink capability, swinging between GND and VCC.
5 VCC power_in Low side and logic supply with a recommended operating range of 10 V to 17 V, an absolute maximum of 20 V, and a VCC UVLO turn-on threshold of 9.1 V typical.
6 HB power_in High side supply return (floating reference for the high side driver) with a recommended bridge pin voltage of −1 V to 700 V.
7 HO output High side gate drive output referenced to HB, with 3.5 A peak source and 3 A peak sink capability.
8 VB power_in High side bootstrap supply with a recommended VB−VHB range of 10 V to 17 V, an absolute maximum boot pin voltage of 720 V, and a VB UVLO turn-on threshold of 8.5 V typical.

Key specifications

Parameter Value
Manufacturer onsemi
Package SOIC-8
Category Motor Driver ICs
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Input Voltage Range VCC 10 17 V 6
High Side Floating Voltage VB−VHB 10 17 V 6
High Side Bridge pin Voltage VHB -1 700 V 6
Operating Junction Temperature Range TJ -40 125 °C 6
High side boot pin voltage VB -0.3 720 V All voltages referenced to GND pin 5
Input voltage range VCC -0.3 20 V All voltages referenced to GND pin 5
High side floating voltage VB−VHB -0.3 20 V All voltages referenced to GND pin 5
Low side drive output voltage VLO -0.3 V Printed maximum is VCC + 0.3 V (symbolic, not numeric) 5
Drive input voltage VLIN, VHIN -5 V Printed maximum is VCC + 0.3 V (symbolic, not numeric) 5
Allowable hb slew rate dVHB/dt 50 V/ns 5
Junction temperature TJ(MAX) 150 °C 5
Storage temperature range TSTG -55 150 °C 5
Lead temperature soldering reflow (Pb-Free) 260 °C SMD styles, Pb-Free versions 5
ESD capability, Human Body Model 4000 V Human Body Model per JESD22-A114E 5
ESD capability, Charge Device Model 1000 V Charge Device Model per JESD22-C101E 5
VCC quiescent current ICCQ 0.15 0.25 mA VLIN=VHIN=0 6
VCC operating current ICCO 0.7 1 mA f = 500 kHz, CLOAD = 0 6
Boot voltage quiescent current IBQ 0.1 0.15 mA VLIN = VHIN = 0 V 6
Boot voltage operating current IBO 0.7 1 mA f = 500 kHz, CLOAD = 0 6
HB to GND quiescent current IHBQ 6 11 A VHS = VHB = 700 V 6
Input rising threshold VHIT 2.3 2.7 3.1 V 6
Input falling threshold VLIT 1 1.4 1.8 V 6
Input pulldown resistance RIN 100 175 250 k VXIN = 5 V 6
VCC UVLO ON threshold (VCC rising) VCCon 8.6 9.1 9.6 V VCC rising 6
VB UVLO ON threshold (VB rising) VBon 8 8.5 9 V VB rising 6
Rise time LO, HO TR 8 15 ns Cload = 1000 pF 7
Fall time LO, HO TF 8 15 ns Cload = 1000 pF 7
NCP51530B propagation delay, VLI falling to VLO falling TDLFF 25 40 ns Cload = 0, Minimum On/Off-time to register as a valid change = 50 ns 7
NCP51530B propagation delay, VHI falling to VHO falling TDHFF 25 40 ns Cload = 0, Minimum On/Off-time to register as a valid change = 50 ns 7
NCP51530B propagation delay, VLI rising to VLO rising TDLRR 25 40 ns Cload = 0, Minimum On/Off-time to register as a valid change = 50 ns 7
NCP51530B propagation delay, VHI rising to VHO rising TDHRR 25 40 ns Cload = 0, Minimum On/Off-time to register as a valid change = 50 ns 7
Thermal resistance, junction to air (SOIC8) RJA 183 °C/W SOIC8 package 6

CAD (KiCad official)

  • Symbol: NCP51530BDR2G
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: ncp51530bdr2g-etched.step / ncp51530bdr2g-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ncp51530bdr2g.step / ncp51530bdr2g.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: onsemi datasheet (26 pp, sha256 bafcbc4e671577a6, retrieved 2026-10-19, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF