main
Ray Publish 0.1.0 8bf48f1 22d ago
{
  "slug": "ncp4318blcdr2g",
  "version": "0.1.0",
  "type": "component",
  "description": "onsemi AC-DC Controllers And Regulators, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "power management (pmic)",
    "ncp4318blcdr2g",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "ncp4318blcdr2g.kicad_sym",
    "ncp4318blcdr2g.kicad_mod",
    "ncp4318blcdr2g.glb",
    "ncp4318blcdr2g.step",
    "ncp4318blcdr2g.lbr",
    "docs/hero.png",
    "docs/ncp4318blcdr2g-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "ncp4318blcdr2g-hero.glb",
    "ncp4318blcdr2g-hero.overlay.json",
    "ncp4318blcdr2g-etched.glb"
  ],
  "component": {
    "mpn": "NCP4318BLCDR2G",
    "manufacturer": "onsemi",
    "package": "SOIC-8",
    "pin_count": 8,
    "category": "Power Management (PMIC)",
    "subcategory": "AC-DC Controllers And Regulators",
    "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590197156528627712",
    "parts": {
      "symbol": "ncp4318blcdr2g.kicad_sym",
      "footprint": "ncp4318blcdr2g.kicad_mod",
      "model_3d": "ncp4318blcdr2g-hero.glb",
      "model_3d_plain": "ncp4318blcdr2g-etched.glb",
      "model_3d_step": "ncp4318blcdr2g-etched.step",
      "model_3d_step_plain": "ncp4318blcdr2g.step",
      "lbr": "ncp4318blcdr2g.lbr"
    },
    "distributor_links": {
      "lcsc": "C2902034"
    },
    "distributor_check": {
      "checked_at": "2026-10-18T09:03:16Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": null,
        "status": "quota"
      },
      "mouser": {
        "pn": null,
        "status": "quota"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "GATE1",
        "type": "output",
        "description": "Gate drive output for SR MOSFET1, clamped to 9 V to 12 V (10.5 V typ) for 12 V < VDD < 33 V with absolute maximum −0.3 V to 17 V, with 1.5 A peak sourcing and 4.5 A peak sinking."
      },
      {
        "number": "2",
        "name": "GND",
        "type": "power_in",
        "description": "Ground reference; all voltage values in the datasheet are stated with respect to this pin."
      },
      {
        "number": "3",
        "name": "VD1",
        "type": "input",
        "description": "Synchronous rectifier drain sense input for SR1, rated −4 V to 200 V absolute (−0.7 V to 180 V recommended); the IOFFSET1 current source flows out of this pin so an external series resistor can set the turn-off threshold, and it is disabled when VDD is under-voltage or switching is disabled in green mode."
      },
      {
        "number": "4",
        "name": "VS1",
        "type": "input",
        "description": "Synchronous rectifier source sense input for SR1, rated −0.3 V to 5.5 V absolute (−0.3 V to 5 V recommended)."
      },
      {
        "number": "5",
        "name": "VS2",
        "type": "input",
        "description": "Synchronous rectifier source sense input for SR2, rated −0.3 V to 5.5 V absolute (−0.3 V to 5 V recommended)."
      },
      {
        "number": "6",
        "name": "VD2",
        "type": "input",
        "description": "Synchronous rectifier drain sense input for SR2, rated −4 V to 200 V absolute (−0.7 V to 180 V recommended); the IOFFSET2 current source flows out of this pin so an external series resistor can set the turn-off threshold, and it is disabled when VDD is under-voltage or switching is disabled in green mode."
      },
      {
        "number": "7",
        "name": "VDD",
        "type": "power_in",
        "description": "Supply voltage, 0 V to 35 V recommended (−0.3 V to 37 V absolute maximum), with turn-on threshold 4.3 V typ and turn-off threshold 3.8 V typ."
      },
      {
        "number": "8",
        "name": "GATE2",
        "type": "output",
        "description": "Gate drive output for SR MOSFET2, clamped to 9 V to 12 V (10.5 V typ) for 12 V < VDD < 33 V with absolute maximum −0.3 V to 17 V, with 1.5 A peak sourcing and 4.5 A peak sinking."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: The page 1 top-view pin-connection list is ordered differently from the page 3 pin table (for exampl; Pin descriptions for VD1/VD2 and GATE1/GATE2 combine several datasheet limits (absolute and recommen"
        ],
        "pages_sent": 22,
        "cost_usd": 0.0987,
        "at": "2026-10-18T09:02:24"
      },
      "datasheet": {
        "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590197156528627712",
        "pages": 22,
        "sha256": "d8a63b4ce9ba5ac6",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 8,
        "described": 8,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
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        "file": "ncp4318blcdr2g.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.0,
          4.9,
          1.75
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "07f46cff378d30e6c27dfd5a03092c795323f86d91c71fc7e743f4f418dc553a",
        "checked": "2026-10-18",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "ncp4318blcdr2g-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.0,
          4.9,
          1.75
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "58f5313459f18653818265c4fff5f46dad91a75ae41ce0246a85d33a2b6a560c",
        "checked": "2026-10-18",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  }
}