component
NCP163AMX500TBG
Public Made by Adomby adom
onsemi Linear Voltage Regulators (LDO), XDFN-4-EP(1x1). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownNCP163AMX500TBG
onsemi · Linear Voltage Regulators (LDO) · XDFN-4-EP(1x1)
NCP163AMX500TBG from onsemi, in a XDFN-4-EP(1x1). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | OUT | power_out | Regulated output voltage that should be bypassed with a small 1 µF ceramic capacitor. |
| 2 | GND | power_in | Common ground connection. |
| 3 | EN | input | Chip enable: applying VEN < 0.4 V disables the regulator, and VEN > 1.2 V enables the LDO. |
| 4 | IN | power_in | Input voltage supply pin, rated 2.2 V to 5.5 V operating and -0.3 V to 6 V absolute maximum. |
| 5 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | onsemi |
| Package | XDFN-4-EP(1x1) |
| Category | Power Management ICs |
| Pins | 5 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Operating Input Voltage | VIN | 2.2 | 5.5 | V | 3 | ||
| Output Voltage Accuracy | VOUT | -2 | 2 | % | VIN = (VOUT(NOM) + 1 V) to 5.5 V; 0 mA ≤ IOUT ≤ 250 mA | 3 | |
| Dropout Voltage (XDFN4), VOUT(NOM) = 5.0 V | VDO | 75 | 105 | mV | IOUT = 250 mA (WLCSP, XDFN4 Packages); VOUT(NOM) = 5.0 V | 3 | |
| Output Current Limit | ICL | 250 | 700 | mA | VOUT = 90% VOUT(NOM) | 3 | |
| Short Circuit Current | ISC | 690 | mA | VOUT = 0 V | 3 | ||
| Quiescent Current | IQ | 12 | 20 | A | IOUT = 0 mA | 3 | |
| Shutdown Current | IDIS | 0.01 | 1 | A | VEN ≤ 0.4 V, VIN = 4.8 V | 3 | |
| EN Input Voltage High | VENH | 1.2 | V | 3 | |||
| EN Input Voltage Low | VENL | 0.4 | V | 3 | |||
| EN Pull Down Current | IEN | 0.2 | 0.5 | A | VEN = 4.8 V | 3 | |
| Turn-On Time | 120 | s | COUT = 1 F, from assertion of VEN to VOUT = 95% VOUT(NOM) | 3 | |||
| Power Supply Rejection Ratio at 1 kHz | PSRR | 92 | dB | IOUT = 20 mA, f = 1 kHz | 3 | ||
| Line Regulation | LineReg | 0.02 | %/V | VOUT(NOM) + 1 V ≤ VIN ≤ 5.5 V | 3 | ||
| Load Regulation (WLCSP, XDFN4) | LoadReg | 0.001 | %/mA | IOUT = 1 mA to 250 mA | 3 | ||
| Output Voltage Noise | VN | 8 | VRMS | f = 10 Hz to 100 kHz, IOUT = 1 mA | 4 | ||
| Output Voltage Noise | VN | 6.5 | VRMS | f = 10 Hz to 100 kHz, IOUT = 250 mA | 4 | ||
| Thermal Shutdown Threshold (rising) | TSDH | 160 | °C | Temperature rising | 4 | ||
| Thermal Shutdown Threshold (falling) | TSDL | 140 | °C | Temperature falling | 4 | ||
| Active Output Discharge Resistance | RDIS | 280 | Ω | VEN < 0.4 V, Version A only | 4 | ||
| Line Transient (rising VIN step) | TranLINE | -1 | mV | VIN = (VOUT(NOM) + 1 V) to (VOUT(NOM) + 1.6 V) in 30 s, IOUT = 1 mA | 4 | ||
| Line Transient (falling VIN step) | TranLINE | 1 | mV | VIN = (VOUT(NOM) + 1.6 V) to (VOUT(NOM) + 1 V) in 30 s, IOUT = 1 mA | 4 | ||
| Load Transient (load step up) | TranLOAD | -40 | mV | IOUT = 1 mA to 200 mA in 10 s | 4 | ||
| Load Transient (load step down) | TranLOAD | 40 | mV | IOUT = 200 mA to 1 mA in 10 s | 4 | ||
| Operating Junction Temperature Range | TJ | -40 | 125 | °C | Performance guaranteed for −40°C ≤ TJ ≤ 125°C | 3 | |
| Input Voltage (absolute maximum) | VIN | -0.3 | 6 | V | 2 | ||
| Output Voltage (absolute maximum) | VOUT | -0.3 | 6 | V | VIN + 0.3 V, max 6 V | 2 | |
| Chip Enable Input (absolute maximum) | VCE | -0.3 | 6 | V | 2 | ||
| Maximum Junction Temperature | TJ | 150 | °C | 2 | |||
| Storage Temperature | TSTG | -55 | 150 | °C | 2 | ||
| ESD Capability, Human Body Model | ESDHBM | 2000 | V | EIA/JESD22-A114 | 2 | ||
| ESD Capability, Machine Model | ESDMM | 200 | V | EIA/JESD22-A115 | 2 | ||
| ESD Capability, Charged Device Model | ESDCDM | 1000 | V | EIA/JESD22-C101, Field Induced Charge Model | 2 | ||
| Thermal Resistance, Junction-to-Air (XDFN4) | RJA | 198.1 | °C/W | Measured according to JEDEC board specification (Note 3) | 3 |
CAD (KiCad official)
- Symbol:
NCP163AMX500TBG - Footprint:
Package_DFN_QFN:OnSemi_XDFN4-1EP_1.0x1.0mm_EP0.52x0.52mm - 3D model: XDFN-4-EP(1x1) (KiCad packages3D, STEP)
- 3D model files:
ncp163amx500tbg-etched.step/ncp163amx500tbg-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ncp163amx500tbg.step/ncp163amx500tbg.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: onsemi datasheet (21 pp, sha256
3ebf4e1f2ec8733f, retrieved 2026-10-27, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).