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NCP163AMX180TBG

onsemi · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · XDFN-4-EP(1x1)

NCP163AMX180TBG from onsemi, in a XDFN-4-EP(1x1). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 OUT power_out Regulated output voltage; the output should be bypassed with a small 1 µF ceramic capacitor, placed as close as possible to the pin.
2 GND power_in Common ground connection.
3 EN input Chip enable: applying VEN < 0.4 V disables the regulator, and pulling VEN > 1.2 V enables the LDO.
4 IN power_in Input voltage supply pin; the operating input voltage range is 2.2 V to 5.5 V.
5 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer onsemi
Package XDFN-4-EP(1x1)
Category Power Management (PMIC)
Pins 5

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Operating Input Voltage VIN 2.2 5.5 V 3
Output Voltage Accuracy VOUT -2 2 % VIN = (VOUT(NOM) + 1 V) to 5.5 V, 0 mA ≤ IOUT ≤ 250 mA (XDFN4, VOUT(NOM) ≥ 1.8 V) 3
Dropout Voltage (XDFN4, VOUT(NOM) = 1.8 V) VDO 180 250 mV IOUT = 250 mA, VOUT(NOM) = 1.8 V (WLCSP, XDFN4 packages) 3
Output Current Limit ICL 250 700 mA VOUT = 90% VOUT(NOM) 3
Quiescent Current IQ 12 20 µA IOUT = 0 mA 3
Shutdown Current IDIS 0.01 1 µA VEN ≤ 0.4 V, VIN = 4.8 V 3
EN Input Voltage High VENH 1.2 V 3
EN Input Voltage Low VENL 0.4 V 3
EN Pull Down Current IEN 0.2 0.5 µA VEN = 4.8 V 3
Line Transient (step up) TranLINE -1 mV VIN = (VOUT(NOM) + 1 V) to (VOUT(NOM) + 1.6 V) in 30 µs, IOUT = 1 mA 4
Line Transient (step down) TranLINE 1 mV VIN = (VOUT(NOM) + 1.6 V) to (VOUT(NOM) + 1 V) in 30 µs, IOUT = 1 mA 4
Load Transient (load step up) TranLOAD -40 mV IOUT = 1 mA to 200 mA in 10 µs 4
Load Transient (load step down) TranLOAD 40 mV IOUT = 200 mA to 1 mA in 10 µs 4
Input Voltage VIN -0.3 6 V 2
Output Voltage VOUT -0.3 6 V Upper limit VIN + 0.3, max 6 V 2
Chip Enable Input VCE -0.3 6 V 2
Maximum Junction Temperature TJ 150 °C 2
Storage Temperature TSTG -55 150 °C 2
ESD Capability, Human Body Model ESDHBM 2000 V JESD22-A114 2
ESD Capability, Machine Model ESDMM 200 V JESD22-A115 2
ESD Capability, Charged Device Model ESDCDM 1000 V JESD22-C101 2
Thermal Resistance, Junction-to-Air (XDFN4) RθJA 198.1 °C/W JEDEC board per JESD51-7 (Note 3) 3
Operating Junction Temperature Range TJ -40 125 °C Electrical characteristics range 3
Input Capacitor CIN 1 µF X7R or X5R recommended 13
Output Capacitor Minimum Effective Capacitance COUT 0.7 µF Over temperature, DC bias and package size 13
Output Capacitor ESR ESR 2 Ω COUT maximum ESR 13

CAD (KiCad official)

  • Symbol: NCP163AMX180TBG
  • Footprint: Package_DFN_QFN:OnSemi_XDFN4-1EP_1.0x1.0mm_EP0.52x0.52mm
  • 3D model: XDFN-4-EP(1x1) (KiCad packages3D, STEP)
  • 3D model files: ncp163amx180tbg-etched.step / ncp163amx180tbg-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ncp163amx180tbg.step / ncp163amx180tbg.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: onsemi datasheet (23 pp, sha256 024c06f95e392f4d, retrieved 2026-10-20, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF