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NCP163AFCS180T2G

Public Made by Adom

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onsemi Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, WLCSP-4(0.6x0.6). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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NCP163AFCS180T2G

onsemi · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · WLCSP-4(0.6x0.6)

NCP163AFCS180T2G from onsemi, in a WLCSP-4(0.6x0.6). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
A1 IN power_in Input voltage supply pin; operating input range is 2.2 V to 5.5 V and absolute maximum VIN is −0.3 V to 6 V.
A2 OUT power_out Regulated output voltage; the output should be bypassed with a small 1 µF ceramic capacitor placed close to the pin.
B1 EN input Chip enable: VEN below 0.4 V disables the regulator and VEN above 1.2 V enables the LDO; the internal pull-down is typically 200 nA.
B2 GND power_in Common ground connection.

Key specifications

Parameter Value
Manufacturer onsemi
Package WLCSP-4(0.6x0.6)
Category Power Management (PMIC)
Pins 4

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Operating Input Voltage VIN 2.2 5.5 V 3
Output Voltage Accuracy VOUT -2 2 % VIN = (VOUT(NOM) + 1 V) to 5.5 V; 0 mA ≤ IOUT ≤ 250 mA 3
Dropout Voltage (WLCSP, XDFN4 packages) VDO 180 250 mV IOUT = 250 mA; VOUT(NOM) = 1.8 V 3
Output Current Limit ICL 250 700 mA VOUT = 90% VOUT(NOM) 3
Quiescent Current IQ 12 20 µA IOUT = 0 mA 3
Shutdown Current IDIS 0.01 1 µA VEN ≤ 0.4 V, VIN = 4.8 V 3
EN Pull Down Current IEN 0.2 0.5 µA VEN = 4.8 V 3
Line Transient (low step) TranLINE -1 mV VIN = (VOUT(NOM) + 1 V) to (VOUT(NOM) + 1.6 V) in 30 µs, IOUT = 1 mA 4
Line Transient (high step) TranLINE 1 mV VIN = (VOUT(NOM) + 1.6 V) to (VOUT(NOM) + 1 V) in 30 µs, IOUT = 1 mA 4
Load Transient (load step up) TranLOAD -40 mV IOUT = 1 mA to 200 mA in 10 µs 4
Load Transient (load step down) TranLOAD 40 mV IOUT = 200 mA to 1 mA in 10 µs 4
Input Voltage (absolute maximum) VIN -0.3 6 V 2
Output Voltage (absolute maximum) VOUT -0.3 6 V Upper limit VIN + 0.3, max 6 V 2
Chip Enable Input (absolute maximum) VCE -0.3 6 V 2
Maximum Junction Temperature TJ 150 °C 2
Storage Temperature TSTG -55 150 °C 2
Thermal Resistance, Junction-to-Air (WLCSP4) RθJA 108 °C/W JEDEC board specification (Note 3) 3

CAD (KiCad official)

  • Symbol: NCP163AFCS180T2G
  • Footprint: Package_CSP:WLCSP-4_0.64x0.64mm_Layout2x2_P0.35mm
  • 3D model: WLCSP-4(0.6x0.6), generated from the KiCad footprint (body from the F.Fab outline, terminals on the pads, 0.35 mm nominal DSBGA height). Neither the vendor nor KiCad ships a 3D model for this package, so the dimensions are nominal, not the manufacturer's CAD (STEP)
  • 3D model files: ncp163afcs180t2g-etched.step / ncp163afcs180t2g-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ncp163afcs180t2g.step / ncp163afcs180t2g.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: onsemi datasheet (23 pp, sha256 024c06f95e392f4d, retrieved 2026-10-19, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF