component
NCP1623ASNT1G
Public Made by Adomby adom
onsemi AC-DC Controllers And Regulators, TSOP-6. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownNCP1623ASNT1G
onsemi · AC-DC Controllers And Regulators · TSOP-6
NCP1623ASNT1G from onsemi, in a TSOP-6. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VCTRL | passive | The error amplifier output connects here, with regulation loop bandwidth set by the feedback compensation network to ground, and the IC grounds this pin in off mode to provide soft-start on the next startup; absolute maximum rating is -0.3 V to 9 V. |
| 2 | GND | power_in | Power supply ground for the controller. |
| 3 | CS/ZCD | input | Multi-function pin that monitors inductor current, the zero-cross detection (ZCD) signal and input/output voltage, with an absolute maximum of -0.3 V to 11.5 V at 5 mA clamp current. |
| 4 | DRV | output | Totem-pole gate driver (-0.5 A / +0.8 A) for high gate-charge power FETs, with DRV clamped to 14 V maximum by the internal clamp. |
| 5 | VCC | power_in | Supplies IC operating current; the absolute maximum is -0.3 V to 30 V, and the operating range after start-up is 9.5 V to 30 V. |
| 6 | FB | input | Feedback input to the error amplifier that monitors PFC output voltage, with a 250 nA built-in sink that triggers UVP if the pin is open, and an absolute maximum of -0.3 V to 9 V; on the NCP1623A it also sources IFB(LL) of 25 µA typical in low-line conditions. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | onsemi |
| Package | TSOP-6 |
| Category | Power Management (PMIC) |
| Pins | 6 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Recommended Operating Junction Temperature Range | TJ | -40 | 125 | °C | 5 | ||
| Power Supply Input | VCC | -0.3 | 30 | V | 5 | ||
| CS/ZCD Pin with 5 mA of Clamp Current | CS/ZCD | -0.3 | 11.5 | V | 5 | ||
| Feedback Pin | FB | -0.3 | 9 | V | 5 | ||
| VCTRL Pin | VCTRL | -0.3 | 9 | V | 5 | ||
| Driver Voltage | DRV | -0.3 | V | max printed as VDRV(HIGH) (Note 2); no numeric max | 5 | ||
| Maximum Junction Temperature | TJ(MAX) | 150 | °C | 5 | |||
| Storage Temperature Range | TSTG | -60 | 150 | °C | 5 | ||
| Thermal Resistance, Junction-to-Air, TSOP-6 | RJA | 230 | °C/W | JEDEC 51-3 (1s0p) test board, 100 mm2 copper area, 1 oz copper | 5 | ||
| VCC Turn-On Voltage | VCC(ON) | 9.75 | 10.5 | 11.25 | V | VCC rising | 6 |
| VCC Turn-Off Voltage | VCC(OFF) | 8.5 | 9 | 9.5 | V | VCC falling | 6 |
| VCC Reset Voltage, ICC Drops to ICC(START) | VCC(RST) | 6 | 7 | 8 | V | VCC falling | 6 |
| IC Start-Up Current | ICC(START) | 20 | 50 | A | VCC = 7 V | 6 | |
| IC Operating Current without Switching | ICC1 | 0.5 | 1 | mA | No switching | 6 | |
| IC Operating Current when Switching | ICC2 | 2 | 3 | mA | fSW = 50 kHz, No CL load | 6 | |
| DRV Rising Time | tR | 15 | 30 | 90 | ns | CL = 1 nF | 6 |
| DRV Falling Time | tF | 10 | 20 | 50 | ns | CL = 1 nF | 6 |
| DRV Source Resistance | ROH | 10 | 20 | 6 | |||
| DRV Sink Resistance | ROL | 7 | 15 | 6 | |||
| DRV High Clamp Voltage | VDRV(HIGH) | 10 | 12 | 14 | V | VCC = 30 V, RL = 33 k | 6 |
| Maximum On-Time at Low Line, Ver. A | tON(MAX−LL) | 10.8 | 12.5 | 14.2 | s | 6 | |
| Maximum On-Time at High Line, Ver. A | tON(MAX−HL) | 4.2 | 5 | 5.8 | s | 6 | |
| On-Time Ratio of Low and High Line | KTON(LL−HL) | 2 | 2.5 | 3 | − | tON(LL)/tON(HL) | 6 |
| Minimum On Time at Low-Line | tON(MIN−LL) | 100 | 180 | 250 | ns | 6 | |
| Minimum On Time at High-Line | tON(MIN−HL) | 50 | 100 | 150 | ns | 6 | |
| Dead-Time 1 | tDT1 | 13 | 18 | 23 | s | VCTRL = 0.63 V | 6 |
| Dead-Time 2 | tDT2 | 5.5 | 8.5 | 11.5 | s | VCTRL = 0.75 V | 6 |
| VCTRL Frequency Foldback Enter Voltage | VCTRL(FF−EN) | 1.87 | 2.08 | 2.29 | V | VCTRL falling | 6 |
| VCTRL Frequency Foldback Exit Voltage | VCTRL(FF−EX) | 1.96 | 2.18 | 2.4 | V | VCTRL rising | 6 |
| Minimum Frequency | fMIN | 24 | 28 | 32 | kHz | 6 | |
| VCTRL Skip Enter Voltage | VCTRL(SKIP−EN) | 0.5 | 0.56 | 0.62 | V | VCTRL falling | 6 |
| VCTRL Skip Exit Voltage | VCTRL(SKIP−EX) | 0.55 | 0.62 | 0.68 | V | VCTRL rising | 6 |
| FB Regulation Reference Voltage | VREF | 2.44 | 2.5 | 2.56 | V | 6 | |
| FB Source Current at Low Line, Ver. A | IFB(LL) | 23.75 | 25 | 26.25 | A | 6 | |
| Error Amplifier Source Current | IEA(SOURCE) | 15 | 20 | 25 | A | VFB = 2.4 V | 6 |
| Error Amplifier Sink Current | IEA(SINK) | -25 | -20 | -15 | A | VFB = 2.6 V | 6 |
| Error Amplifier Gain | GEA | 110 | 200 | 290 | S | 6 | |
| VCTRL Maximum Clamping Voltage | VCTRL(MAX) | 4 | 4.5 | 5 | V | VFB = 2 V | 6 |
| VCTRL Minimum Clamping Voltage | VCTRL(MIN) | 0.3 | 0.5 | 0.8 | V | VFB = 3 V | 6 |
| VCTRL Startup Source Current | IVCTRL(START) | 90 | 120 | 150 | A | 6 | |
| FB DRE Enter Voltage Ratio | KFB(DRE−EN) | 94.5 | 95.5 | 96.5 | % | VFB(DRE−EN) / VREF | 7 |
| FB DRE Exit Voltage Ratio | KFB(DRE−EX) | 96.5 | 97.5 | 98.5 | % | VFB(DRE−EX) / VREF | 7 |
| VCTRL DRE Source Current | IVCTRL(DRE) | 180 | 215 | 250 | A | 7 | |
| FB SOVP Enter Voltage Ratio | KFB(SOVP−EN) | 103.5 | 105 | 106.5 | % | VFB(SOVP−EN) / VREF | 7 |
| FB SOVP Exit Voltage Ratio | KFB(SOVP−EX) | 101.5 | 103 | 104.5 | % | VFB(SOVP−EX) / VREF | 7 |
| FB SOVP Enter Voltage Ratio at Low Line, Ver. A | KFB(SOVP−EN−LL) | 108.5 | 110 | 111.5 | % | VFB(SOVP−EN−LL) / VREF | 7 |
| FB SOVP Exit Voltage Ratio at Low Line, Ver. A | KFB(SOVP−EX−LL) | 106.5 | 108 | 109.5 | % | VFB(SOVP−EX−LL) / VREF | 7 |
| FB FOVP Enter Voltage Ratio | KFB(FOVP−EN) | 105.5 | 107 | 108.5 | % | VFB(FOVP−EN) / VREF | 7 |
| FB FOVP Exit Voltage Ratio | KFB(FOVP−EX) | 103.5 | 105 | 106.5 | % | VFB(FOVP−EX) / VREF | 7 |
| FB FOVP Enter Voltage Ratio at Low Line, Ver. A | KFB(FOVP−EN−LL) | 112.5 | 114 | 115.5 | % | VFB(FOVP−EN−LL) / VREF | 7 |
| FB FOVP Exit Voltage Ratio at Low Line, Ver. A | KFB(FOVP−EX−LL) | 110.5 | 112 | 113.5 | % | VFB(SOVP−EX−LL) / VREF | 7 |
| FB UVP Enter Voltage | VFB(UVP−EN) | 240 | 300 | 360 | mV | VFB falling | 7 |
| FB UVP Exit Voltage | VFB(UVP−EX) | 470 | 530 | 590 | mV | VFB rising | 7 |
| FB UVP Enter Voltage at Low Line, Ver. A | VFB(UVP−EN−LL) | 1.1 | 1.2 | 1.3 | V | VFB falling | 7 |
| FB UVP Exit Voltage at Low Line, Ver. A | VFB(UVP−EX−LL) | 1.2 | 1.3 | 1.4 | V | VFB rising | 7 |
| FB UVP Sink Current | IFB(UVP) | 50 | 250 | 450 | nA | 7 | |
| CS Over-Current Protection (OCP) Voltage | VCS(OCP) | 450 | 500 | 550 | mV | 7 | |
| CS OCP Leading Edge Blanking Time | tOCP(LEB) | 320 | 400 | 460 | ns | 7 | |
| CS Over-Stress Protection (OVS) Voltage | VCS(OVS) | 675 | 750 | 825 | mV | 7 | |
| CS OVS Watch Dog Timer | tOVS(WDG) | 700 | 800 | 900 | s | 7 |
CAD (KiCad official)
- Symbol:
NCP1623ASNT1G - Footprint:
Package_SO:TSOP-6_1.65x3.05mm_P0.95mm - 3D model: TSOP-6 (KiCad packages3D, STEP)
- 3D model files:
ncp1623asnt1g-etched.step/ncp1623asnt1g-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ncp1623asnt1g.step/ncp1623asnt1g.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: onsemi datasheet (20 pp, sha256
6e5feae9cd266fb6, retrieved 2026-10-19, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).