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Contents

README

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NCP161AFCT280T2G

onsemi · Linear Voltage Regulators (LDO) · WLCSP-4(0.6x0.6)

NCP161AFCT280T2G from onsemi, in a WLCSP-4(0.6x0.6). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
A1 IN power_in Input voltage supply pin; operating input range is 1.9 V to 5.5 V (absolute maximum 6 V).
A2 OUT power_out Regulated output voltage (2.8 V for this part) that should be bypassed with a small 1 µF ceramic capacitor.
B1 EN input Chip enable: VEN < 0.4 V disables the regulator and VEN > 1.2 V enables the LDO, with an internal pull-down current source of typ. 200 nA.
B2 GND power_in Common ground connection.

Key specifications

Parameter Value
Manufacturer onsemi
Package WLCSP-4(0.6x0.6)
Category Power Management ICs
Pins 4

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Operating Input Voltage VIN 1.9 5.5 V 4
Output Voltage Accuracy VOUT -2 2 % VIN = VOUT(NOM) + 1 V, 0 mA ≤ IOUT ≤ 450 mA, WLCSP4 4
Dropout Voltage VDO 175 290 mV IOUT = 450 mA, WLCSP4, VOUT(NOM) = 2.8 V 4
Output Current Limit ICL 450 700 mA VOUT = 90% VOUT(NOM) 4
Short Circuit Current ISC 690 mA VOUT = 0 V 4
Quiescent Current IQ 18 23 µA IOUT = 0 mA 4
Shutdown Current IDIS 0.01 1 µA VEN ≤ 0.4 V, VIN = 4.8 V 4
EN Input Voltage High VENH 1.2 V 4
EN Input Voltage Low VENL 0.4 V 4
EN Pull Down Current IEN 0.2 0.5 µA VEN = 4.8 V 4
Active output discharge resistance RDIS 280 Ω VEN < 0.4 V, Version A only 4
Line transient TranLINE -1 1 mV VIN = (VOUT(NOM) + 1 V) to (VOUT(NOM) + 1.6 V) in 30 µs, IOUT = 1 mA 4
Load transient TranLOAD -40 40 mV IOUT = 1 mA to 450 mA in 10 µs 4
Line Regulation LineReg 0.02 %/V VOUT(NOM) + 1 V ≤ VIN ≤ 5.5 V 4
Turn-On Time 120 µs COUT = 1 µF, from assertion of VEN to VOUT = 95% VOUT(NOM) 4
Output Voltage Noise VN 10 µVRMS f = 10 Hz to 100 kHz, IOUT = 250 mA 4
Thermal Shutdown Threshold TSDH 160 °C Temperature rising 4
Thermal Shutdown Threshold TSDL 140 °C Temperature falling 4
Input Voltage VIN -0.3 6 V 3
Output Voltage VOUT -0.3 6 V -0.3 to VIN + 0.3, max. 6 V 3
Chip Enable Input VCE -0.3 6 V 3
Maximum Junction Temperature TJ 150 °C 3
Storage Temperature TSTG -55 150 °C 3
ESD Capability, Human Body Model ESDHBM 2000 V 3
ESD Capability, Machine Model ESDMM 200 V 3
Thermal Resistance, Junction-to-Air, CSP4 RθJA 108 °C/W CSP4, JEDEC JESD51-7 board 3

CAD (KiCad official)

  • Symbol: NCP161AFCT280T2G
  • Footprint: Package_CSP:WLCSP-4_0.64x0.64mm_Layout2x2_P0.35mm
  • 3D model: WLCSP-4(0.6x0.6), generated from the KiCad footprint (body from the F.Fab outline, terminals on the pads, 0.35 mm nominal DSBGA height). Neither the vendor nor KiCad ships a 3D model for this package, so the dimensions are nominal, not the manufacturer's CAD (STEP)
  • 3D model files: ncp161afct280t2g-etched.step / ncp161afct280t2g-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ncp161afct280t2g.step / ncp161afct280t2g.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: onsemi datasheet (23 pp, sha256 3032b450d455a119, retrieved 2026-10-22, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF