component
NCP1399APDR2G
Public Made by Adomby adom
onsemi AC-DC Controllers and Regulators, SOIC-16-EP. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
main
Ray
ncp1399apdr2g: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding)
25e47b5
21h ago
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{
"schema_version": 1,
"type": "component",
"slug": "ncp1399apdr2g",
"title": "NCP1399APDR2G",
"brief": "onsemi AC-DC Controllers and Regulators, SOIC-16-EP. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.",
"version": "0.2.0",
"license": "CC-BY-SA-4.0",
"tags": [
"component",
"pmic",
"ncp1399apdr2g"
],
"component": {
"mpn": "NCP1399APDR2G",
"manufacturer": "onsemi",
"package": "SOIC-16-EP",
"pin_count": 14,
"category": "PMIC",
"subcategory": "AC-DC Controllers and Regulators",
"datasheet": "https://www.onsemi.com/pdf/datasheet/ncp1399ap-d.pdf",
"parts": {
"symbol": "ncp1399apdr2g.kicad_sym",
"footprint": "ncp1399apdr2g.kicad_mod",
"model_3d": "ncp1399apdr2g-etched.glb",
"model_3d_plain": "ncp1399apdr2g.glb",
"model_3d_step": "ncp1399apdr2g-etched.step",
"model_3d_step_plain": "ncp1399apdr2g.step",
"lbr": "ncp1399apdr2g.lbr"
},
"distributor_links": {
"lcsc": "C377543"
},
"pins": [
{
"number": "1",
"name": "HV",
"type": "power_in",
"description": "High-voltage startup current source input. Connects to the rectified AC line or bulk capacitor (up to 600 V) to implement the internal startup current source and Dynamic Self-Supply (DSS)."
},
{
"number": "3",
"name": "VBULK/PFCFB",
"type": "input",
"description": "Bulk voltage monitoring input. Receives a resistor-divided bulk-voltage sample to implement Brown-Out protection (0 to 5.5 V absolute max)."
},
{
"number": "4",
"name": "SKIP/REM",
"type": "input",
"description": "Skip threshold adjust / Off-mode (remote) control input. A resistor to GND sets the skip-in threshold (NCP1399Ay). Pulled up by external auxiliary source to activate off-mode/standby; pull-down by optocoupler deactivates off-mode (NCP1399By)."
},
{
"number": "5",
"name": "LLCFB",
"type": "input",
"description": "LLC feedback input. Defines operating frequency based on load; controls skip-mode entry under light load and, for NCP1399Ay, activates off-mode operation."
},
{
"number": "6",
"name": "LLCCS",
"type": "input",
"description": "LLC current-sense input. Senses divided resonant-capacitor voltage to perform on-time modulation, out-of-resonance switching protection, over-current protection, and secondary-side short-circuit protection (-5 to +5 V abs max)."
},
{
"number": "7",
"name": "OTP/OVP",
"type": "input",
"description": "Combined over-temperature and over-voltage protection input. A single pin implements both OTP and OVP latch triggers (0 to 5.5 V abs max)."
},
{
"number": "8",
"name": "PON/OFF",
"type": "input",
"description": "PFC turn-off feedback-level adjust. Sets the FB threshold below which the external PFC stage is disabled, enabling load-dependent PFC on/off control."
},
{
"number": "9",
"name": "PFCMODE",
"type": "output",
"description": "PFC mode / external HV switch control output. Provides supply voltage to the PFC front-stage controller and/or enables the VBULK sensing network HV switch."
},
{
"number": "10",
"name": "VCC",
"type": "power_in",
"description": "Controller supply input. Accepts up to 20 V; VCC_ON ~15.8 V (or ~12 V on AL/AM/AR/AS variants), VCC_OFF ~9.5 V UVLO. Operating current 5.4 mA typ at 100 kHz."
},
{
"number": "11",
"name": "GND",
"type": "power_in",
"description": "Analog ground. Common return for adjustment components, sensing networks, and low-side driver output."
},
{
"number": "12",
"name": "MLOWER",
"type": "output",
"description": "Low-side gate driver output. Drives the lower MOSFET of the half-bridge; output swings 0 to VCC (up to ~20 V)."
},
{
"number": "14",
"name": "MUPPER",
"type": "output",
"description": "High-side (floating) gate driver output. Drives the upper MOSFET of the half-bridge, referenced to HB with supply from VBOOT."
},
{
"number": "15",
"name": "HB",
"type": "power_in",
"description": "Half-bridge connection / high-side driver return. Connects to the switching node between the two half-bridge MOSFETs; withstands up to ~600 V and dV/dt up to 50 V/ns."
},
{
"number": "16",
"name": "VBOOT",
"type": "power_in",
"description": "Bootstrap supply pin. Provides the floating VCC for the high-side driver referenced to HB (VBOOT_ON ~9 V, VBOOT_OFF ~8.2 V, up to 620 V absolute)."
}
],
"provenance": {
"extractor": "ds2sf",
"datasheet": {
"url": "https://www.onsemi.com/pdf/datasheet/ncp1399ap-d.pdf",
"pages": 45,
"sha256": "a9c71c608fac5987",
"source_tier": "mfr"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 14,
"described": 14,
"cites_pages": true,
"refuses_to_fabricate": true
}
},
"viewers": {
"symbol": "viewers/symbol.html",
"footprint": "viewers/footprint.html"
},
"pin1": {
"pad": "1",
"at": [
-2.475,
-4.445
],
"corner": "top-left",
"source": "silk-marker",
"derived_from": "SOIC-16_3.9x9.9mm_P1.27mm@sha256:f9b5075740f7816c",
"mark": "drawn"
},
"models_3d": [
{
"file": "ncp1399apdr2g.step",
"role": "plain",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
6.0,
9.9,
1.75
],
"zmin_mm": -0.0,
"centre_offset_mm": 0.0,
"footprint_binding": "identity",
"sha256": "d5eeddb4c0b304dc61950919b126fc61d7586abd5f16ab71a2a79759ec6498bf",
"checked": "2026-10-07",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
},
{
"file": "ncp1399apdr2g-etched.step",
"role": "eda",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
6.0,
9.9,
1.75
],
"zmin_mm": -0.0,
"centre_offset_mm": 0.0,
"footprint_binding": "identity",
"sha256": "4bfa295c580464f223531ccf8bbd938c2a2309d19cfb5455f3bd22d6f345f30d",
"checked": "2026-10-07",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
}
]
},
"metadata": {
"specs": {
"Manufacturer": "onsemi",
"Package": "SOIC-16-EP",
"Category": "PMIC",
"Pins": "14"
}
},
"sections": [
"hero",
"viewers",
"readme",
"breadcrumbs",
"info"
],
"discovery_triggers": [
"ncp1399apdr2g"
],
"discovery_pitch": "NCP1399APDR2G (onsemi) component page with datasheet-verified CAD.",
"author": {
"name": "Ray",
"email": "[email protected]"
},
"dependencies": {},
"hero": {
"type": "image",
"path": "docs/hero.png"
},
"files": [
"page.json",
"README.md",
"ncp1399apdr2g.kicad_sym",
"ncp1399apdr2g.kicad_mod",
"ncp1399apdr2g.glb",
"ncp1399apdr2g.step",
"ncp1399apdr2g-etched.step",
"ncp1399apdr2g.lbr",
"docs/hero.png",
"docs/ncp1399apdr2g-datasheet.pdf",
"viewers/symbol.html",
"viewers/footprint.html"
],
"visibility": {
"public": true
},
"variants": [
{
"mpn": "NCP1399APDR2GAADR2G",
"kind": "packaging"
},
{
"mpn": "NCP1399APDR2GBADR2G",
"kind": "packaging"
},
{
"mpn": "NCP1399APDR2GACDR2G",
"kind": "packaging"
},
{
"mpn": "NCP1399APDR2GAFDR2G",
"kind": "packaging"
},
{
"mpn": "NCP1399APDR2GAGDR2G",
"kind": "packaging"
},
{
"mpn": "NCP1399APDR2GAHDR2G",
"kind": "packaging"
},
{
"mpn": "NCP1399APDR2GAIDR2G",
"kind": "packaging"
},
{
"mpn": "NCP1399APDR2GAJDR2G",
"kind": "packaging"
},
{
"mpn": "NCP1399APDR2GAKDR2G",
"kind": "packaging"
},
{
"mpn": "NCP1399APDR2GALDR2G",
"kind": "packaging"
},
{
"mpn": "NCP1399APDR2GAMDR2G",
"kind": "packaging"
},
{
"mpn": "NCP1399APDR2GANDR2G",
"kind": "packaging"
},
{
"mpn": "NCP1399APDR2G",
"kind": "packaging"
},
{
"mpn": "NCP1399APDR2GARDR2G",
"kind": "packaging"
},
{
"mpn": "NCP1399APDR2GASDR2G",
"kind": "packaging"
}
],
"updated_at": "2026-09-25T02:55:28.305Z"
}