component
NCP1377BDR2G
Public Made by Adomby adom
onsemi AC-DC Controllers And Regulators, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownNCP1377BDR2G
onsemi · AC-DC Controllers And Regulators · SOIC-8
NCP1377BDR2G from onsemi, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | Demag | input | The auxiliary flyback signal provides core reset detection and a fixed overvoltage detection level of 7.2 V, with maximum pin current of +3.0/−2.0 mA. |
| 2 | FB | input | The optocoupler connection sets the peak current setpoint, and pulling this pin below the internal skip level shuts the device off. |
| 3 | CS | input | This current sense input routes the primary current through the leading edge blanking to the comparator, and a series resistor sets the skip cycle level; other pins are limited to −0.3 to 10 V. |
| 4 | GND | power_in | This is the IC ground reference. |
| 5 | Drv | output | This is the driver output to the external MOSFET, with a continuous power supply or drive voltage maximum of 18 V (VCC, Drv). |
| 6 | VCC | power_in | This is the IC supply pin, connected to an external bulk capacitor of typically 10 µF, with a continuous maximum of 18 V and a transient pulse maximum of 25 V (duration < 10 ms, ICC < 20 mA). |
| 7 | NC | unconnected | This pin is unconnected and is present only to ensure adequate creepage distance. |
| 8 | HV | power_in | This high-voltage pin is connected to the high-voltage rail, injects a constant current of 4 mA into the VCC bulk capacitor for lossless startup, and is rated up to 500 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | onsemi |
| Package | SOIC-8 |
| Category | Power Management (PMIC) |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| VCC increasing level at which the current source turns off | VCCON | 11.6 | 12.5 | 13.7 | V | 4 | |
| Minimum operating voltage after turn-on | VCCOFF | 7 | 7.5 | 8.2 | V | 4 | |
| Internal IC consumption, no output load on pin 5 | ICC1 | 1 | 1.3 | mA | No output load on pin 5, FSW = 60 kHz | 4 | |
| Internal IC consumption, 1.0 nF output load on pin 5 | ICC2 | 1.6 | 2 | mA | 1.0 nF output load on pin 5, FSW = 60 kHz | 4 | |
| High-voltage current source | IC1 | 2.4 | 4 | 6 | mA | VCC = 10 V, Vpin8 = 50 V | 4 |
| Startup leakage | IHVLeak | 30 | 70 | uA | Vpin8 = 500 V | 4 | |
| High voltage minimum startup | HVmin | 20 | 23.5 | V | VCC = VCC(on)-0.2 V, ICC = 1 mA | 4 | |
| Source resistance | ROH | 12 | 20 | 36 | ohm | 4 | |
| Sink resistance | ROL | 5 | 10 | 19 | ohm | 4 | |
| Maximum internal current setpoint | ILimit | 0.9 | 1 | 1.1 | V | 4 | |
| Propagation delay from current detection to gate OFF state | TDEL | 100 | 160 | ns | 4 | ||
| OVP internal reference level | Vref | 6.4 | 7.2 | 8 | V | 4 | |
| Demagnetization input threshold voltage | Vth | 35 | 50 | 90 | mV | Vpin 1 decreasing | 4 |
| Input clamp voltage, high state | VCH | 8 | 10 | 12 | V | Ipin 1 = 3.0 mA | 4 |
| Input clamp voltage, low state | VCL | -0.9 | -0.7 | -0.5 | V | Ipin 1 = -2.0 mA | 4 |
| Continuous power supply or drive voltage | VCC, Drv | 18 | V | Continuous | 3 | ||
| Transient power supply voltage | VCC Pulse | 25 | V | Duration < 10 ms, IVCC < 20 mA | 3 | ||
| Maximum voltage on all other pins except pin 8 (HV), pin 6 (VCC) and pin 5 (Drv) | -0.3 | 10 | V | 3 | |||
| Maximum current into all pins except VCC (6), HV (8) and Demag (1) when 10 V ESD diodes are activated | 5 | mA | 10 V ESD diodes activated | 3 | |||
| Maximum current in pin 1 (Demag) | -2 | 3 | mA | 3 | |||
| Maximum junction temperature | TJMAX | 150 | C | 3 | |||
| Temperature shutdown | 155 | C | 3 | ||||
| Hysteresis in shutdown | 30 | C | 3 | ||||
| Storage temperature range | -60 | 150 | C | 3 | |||
| ESD capability, HBM model | 2 | kV | All pins except VCC and HV | 3 | |||
| ESD capability, machine model | 200 | V | 3 | ||||
| Maximum voltage on pin 8 (HV) and pin 6 (VCC) | VHV | 500 | V | Decoupled to ground with 10 uF | 3 | ||
| Thermal resistance, junction-to-case | RJC | 57 | C/W | 3 | |||
| Thermal resistance, junction-to-air, SOIC version | RJA | 178 | C/W | SOIC version | 3 |
CAD (KiCad official)
- Symbol:
NCP1377BDR2G - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
ncp1377bdr2g-etched.step/ncp1377bdr2g-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ncp1377bdr2g.step/ncp1377bdr2g.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: onsemi datasheet (20 pp, sha256
b5f7172c72b30259, retrieved 2026-10-18, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).