component
NCP1252EDR2G
Public Made by Adomby adom
onsemi AC-DC Controllers and Regulators, SOIC-8. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
main
Ray
ncp1252edr2g: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding)
b5a586b
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{
"schema_version": 1,
"type": "component",
"slug": "ncp1252edr2g",
"title": "NCP1252EDR2G",
"brief": "onsemi AC-DC Controllers and Regulators, SOIC-8. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.",
"version": "0.2.0",
"license": "CC-BY-SA-4.0",
"tags": [
"component",
"pmic",
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],
"component": {
"mpn": "NCP1252EDR2G",
"manufacturer": "onsemi",
"package": "SOIC-8",
"pin_count": 8,
"category": "PMIC",
"subcategory": "AC-DC Controllers and Regulators",
"datasheet": "https://wmsc.lcsc.com/wmsc/upload/file/pdf/v2/lcsc/2210201930_onsemi-NCP1252EDR2G_C904430.pdf",
"parts": {
"symbol": "ncp1252edr2g.kicad_sym",
"footprint": "ncp1252edr2g.kicad_mod",
"model_3d": "ncp1252edr2g-etched.glb",
"model_3d_plain": "ncp1252edr2g.glb",
"model_3d_step": "ncp1252edr2g-etched.step",
"model_3d_step_plain": "ncp1252edr2g.step",
"lbr": "ncp1252edr2g.lbr"
},
"distributor_links": {
"lcsc": "C904430"
},
"pins": [
{
"number": "1",
"name": "FB",
"type": "input",
"description": "Feedback input. Directly connects to an optocoupler collector. Internally pulled up (~3.5 kΩ) to Vdd; the FB voltage is divided by 3 to form the current setpoint (VILIM = 1 V). Max FB current 1.5 mA."
},
{
"number": "2",
"name": "BO",
"type": "input",
"description": "Brown-Out input. Monitors an image of the input bulk voltage via a resistor divider to provide brown-out protection. Threshold VBO = 1 V typ; internal 10 µA hysteresis current source."
},
{
"number": "3",
"name": "CS",
"type": "input",
"description": "Current Sense input. Monitors the primary MOSFET current through a sense resistor and sets the ramp-compensation amplitude. Cycle-by-cycle limit VILIM = 1 V; fault threshold FCS = 1 V; 160 ns leading-edge blanking; internal ramp comp Rramp ≈ 26.5 kΩ."
},
{
"number": "4",
"name": "RT",
"type": "passive",
"description": "Timing element. A resistor to ground fixes the switching frequency (RT = 43 kΩ → fOSC ≈ 100 kHz; RT = 8.5 kΩ → fOSC ≈ 500 kHz). Frequency is jittered ±5% at 3.33 ms period."
},
{
"number": "5",
"name": "GND",
"type": "power_in",
"description": "Controller ground reference pin."
},
{
"number": "6",
"name": "DRV",
"type": "output",
"description": "Gate driver output to the external power MOSFET. +500 mA source / -800 mA sink capability; source resistance 10 Ω typ, sink 6 Ω typ; clamped at 15 V typ (max 18 V) to protect the MOSFET gate."
},
{
"number": "7",
"name": "VCC",
"type": "power_in",
"description": "Main supply pin. Operating range 8 V to 28 V (30 V transient <10 ms for IVCC<20 mA). For the E version, VCC(on) ≈ 14 V, VCC(off) ≈ 9 V with 5 V hysteresis (auto-recovery UVLO). Max injected current 20 mA."
},
{
"number": "8",
"name": "SSTART",
"type": "passive",
"description": "Soft-start pin. A capacitor to ground sets the soft-start duration (charge current ISS = 10 µA typ, VSS = 4 V). The pin is held to ground during the internal start-up delay timer (no delay for E version)."
}
],
"provenance": {
"extractor": "ds2sf",
"datasheet": {
"url": "https://wmsc.lcsc.com/wmsc/upload/file/pdf/v2/lcsc/2210201930_onsemi-NCP1252EDR2G_C904430.pdf",
"pages": 22,
"sha256": "5eceb5f0fc9b12f2",
"source_tier": "lcsc"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 8,
"described": 8,
"cites_pages": true,
"refuses_to_fabricate": true
}
},
"viewers": {
"symbol": "viewers/symbol.html",
"footprint": "viewers/footprint.html"
},
"pin1": {
"pad": "1",
"at": [
-2.475,
-1.905
],
"corner": "top-left",
"source": "silk-marker",
"derived_from": "SOIC-8_3.9x4.9mm_P1.27mm@sha256:074ecb2092b24fa4",
"mark": "drawn"
},
"models_3d": [
{
"file": "ncp1252edr2g.step",
"role": "plain",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
6,
4.9,
1.75
],
"zmin_mm": 0,
"centre_offset_mm": 0,
"footprint_binding": "identity",
"sha256": "07f46cff378d30e6c27dfd5a03092c795323f86d91c71fc7e743f4f418dc553a",
"checked": "2026-10-07",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
},
{
"file": "ncp1252edr2g-etched.step",
"role": "eda",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
6,
4.9,
1.75
],
"zmin_mm": 0,
"centre_offset_mm": 0,
"footprint_binding": "identity",
"sha256": "0fa2899f00f08c725bf7f8c333c53e469c5c51d4cb6a8968cfdd8de08d5e7791",
"checked": "2026-10-07",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
}
]
},
"metadata": {
"specs": {
"Manufacturer": "onsemi",
"Package": "SOIC-8",
"Category": "PMIC",
"Pins": "8"
}
},
"sections": [
"hero",
"viewers",
"readme",
"breadcrumbs",
"info"
],
"discovery_triggers": [
"ncp1252edr2g"
],
"discovery_pitch": "NCP1252EDR2G (onsemi) component page with datasheet-verified CAD.",
"author": {
"name": "Ray"
},
"dependencies": {},
"hero": {
"type": "image",
"path": "docs/hero.png"
},
"files": [
"page.json",
"README.md",
"ncp1252edr2g.kicad_sym",
"ncp1252edr2g.kicad_mod",
"ncp1252edr2g.glb",
"ncp1252edr2g.step",
"ncp1252edr2g-etched.step",
"ncp1252edr2g.lbr",
"docs/hero.png",
"docs/ncp1252edr2g-datasheet.pdf",
"viewers/symbol.html",
"viewers/footprint.html"
],
"visibility": {
"public": true
},
"variants": [
{
"mpn": "NCP1252EDR2G",
"kind": "packaging"
},
{
"mpn": "NCP1252EDR2GEPG",
"kind": "packaging"
}
],
"updated_at": "2026-09-25T02:54:22.146Z"
}