component
NCP1252DDR2G
Public Made by Adomby adom
onsemi DC-DC Converters, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
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{
"schema_version": 1,
"type": "component",
"slug": "ncp1252ddr2g",
"title": "NCP1252DDR2G",
"brief": "onsemi DC-DC Converters, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
"version": "0.1.0",
"license": "CC-BY-SA-4.0",
"tags": [
"component",
"power management (pmic)",
"ncp1252ddr2g",
"factory-2.0.0",
"extractor-text"
],
"component": {
"mpn": "NCP1252DDR2G",
"manufacturer": "onsemi",
"package": "SOIC-8",
"pin_count": 8,
"category": "Power Management (PMIC)",
"subcategory": "DC-DC Converters",
"datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588918356338884608",
"parts": {
"symbol": "ncp1252ddr2g.kicad_sym",
"footprint": "ncp1252ddr2g.kicad_mod",
"model_3d": "ncp1252ddr2g-hero.glb",
"model_3d_plain": "ncp1252ddr2g.glb",
"model_3d_step": "ncp1252ddr2g-etched.step",
"model_3d_step_plain": "ncp1252ddr2g.step",
"lbr": "ncp1252ddr2g.lbr"
},
"distributor_links": {
"lcsc": "C603530",
"digikey": "NCP1252DDR2GOSTR-ND",
"mouser": "863-NCP1252DDR2G"
},
"distributor_check": {
"checked_at": "2026-10-09T17:55:24Z",
"source": "Component Ocean /api/assign-pns",
"digikey": {
"pn": "NCP1252DDR2GOSTR-ND",
"status": "found",
"lifecycle": "Active"
},
"mouser": {
"pn": "863-NCP1252DDR2G",
"status": "found"
}
},
"pins": [
{
"number": "1",
"name": "FB",
"type": "input",
"description": "This pin directly connects to an optocoupler collector and provides the feedback input."
},
{
"number": "2",
"name": "BO",
"type": "input",
"description": "This Brown-out input monitors the input voltage image to offer Brown-out protection."
},
{
"number": "3",
"name": "CS",
"type": "input",
"description": "The current sense pin monitors the primary current and allows selection of the ramp compensation amplitude."
},
{
"number": "4",
"name": "RT",
"type": "passive",
"description": "A timing resistor connected to ground fixes the switching frequency (adjustable up to 500 kHz per the features list)."
},
{
"number": "5",
"name": "GND",
"type": "power_in",
"description": "This is the controller ground pin."
},
{
"number": "6",
"name": "Drv",
"type": "output",
"description": "This driver pin connects to the MOSFET gate; the maximum voltage on the DRV pin is −0.3 V to VCC."
},
{
"number": "7",
"name": "VCC",
"type": "power_in",
"description": "This pin accepts a supply voltage range from 8 V up to 28 V (28 V continuous maximum, 30 V transient for 10 ms with IVcc < 20 mA; maximum injected current 20 mA)."
},
{
"number": "8",
"name": "SSTART",
"type": "passive",
"description": "A capacitor connected to ground selects the soft-start duration; the soft start is grounded during the delay timer."
}
],
"provenance": {
"extractor": "extract_pins 0.3",
"factory_chain": {
"factory": "2.0.0",
"extractor": "extract_pins 0.3",
"primary_model": "claude-haiku-5-5",
"primary_mode": "text",
"consensus_model": "claude-sonnet-5-5",
"consensus": "agreed",
"guards": "pin_guards 0.1: passed",
"guard_notes": [
"extractor flagged: Pin numbers, names and descriptions are taken from Table 1 (PIN FUNCTIONS) on page 2 and the SOIC-8 ; Table 1 names pin 8 'SSTART' while the page 1 pin-connection diagram labels it 'SS'. The table name ; Table 1 prints the pin name as 'Drv' while the maximum ratings table uses 'DRV'. The table name is u"
],
"pages_sent": 9,
"cost_usd": 0.0677,
"at": "2026-10-09T17:50:38"
},
"datasheet": {
"url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588918356338884608",
"pages": 22,
"sha256": "e5ecd90123122b18",
"source_tier": "lcsc"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 8,
"described": 8,
"cites_pages": true,
"refuses_to_fabricate": true
}
},
"viewers": {
"symbol": "viewers/symbol.html",
"footprint": "viewers/footprint.html"
},
"models_3d": [
{
"file": "ncp1252ddr2g.step",
"role": "plain",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
6,
4.9,
1.75
],
"zmin_mm": 0,
"centre_offset_mm": 0,
"footprint_binding": "identity",
"sha256": "07f46cff378d30e6c27dfd5a03092c795323f86d91c71fc7e743f4f418dc553a",
"checked": "2026-10-09",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
},
{
"file": "ncp1252ddr2g-etched.step",
"role": "eda",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
6,
4.9,
1.75
],
"zmin_mm": 0,
"centre_offset_mm": 0,
"footprint_binding": "identity",
"sha256": "17960559dec6fe8f316ad14d149f4fe96182ee90f5be2bc7315741e6d64212f4",
"checked": "2026-10-09",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
}
]
},
"metadata": {
"specs": {
"Manufacturer": "onsemi",
"Package": "SOIC-8",
"Category": "Power Management (PMIC)",
"Pins": "8"
}
},
"variants": [],
"sections": [
"hero",
"viewers",
"readme",
"breadcrumbs",
"info"
],
"discovery_triggers": [
"ncp1252ddr2g"
],
"discovery_pitch": "NCP1252DDR2G (onsemi) component page: datasheet pinout, KiCad symbol, footprint and 3D.",
"author": {
"name": "Ray",
"email": "[email protected]"
},
"dependencies": {},
"hero": {
"type": "image",
"path": "docs/hero.png"
},
"files": [
"page.json",
"README.md",
"ncp1252ddr2g.kicad_sym",
"ncp1252ddr2g.kicad_mod",
"ncp1252ddr2g.glb",
"ncp1252ddr2g.step",
"ncp1252ddr2g.lbr",
"docs/hero.png",
"docs/ncp1252ddr2g-datasheet.pdf",
"viewers/symbol.html",
"viewers/footprint.html",
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"visibility": {
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}
}