component
NCP1252DDR2G
Public Made by Adomby adom
onsemi DC-DC Converters, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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NCP1252DDR2G
onsemi · DC-DC Converters · SOIC-8
NCP1252DDR2G from onsemi, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | FB | input | This pin directly connects to an optocoupler collector and provides the feedback input. |
| 2 | BO | input | This Brown-out input monitors the input voltage image to offer Brown-out protection. |
| 3 | CS | input | The current sense pin monitors the primary current and allows selection of the ramp compensation amplitude. |
| 4 | RT | passive | A timing resistor connected to ground fixes the switching frequency (adjustable up to 500 kHz per the features list). |
| 5 | GND | power_in | This is the controller ground pin. |
| 6 | Drv | output | This driver pin connects to the MOSFET gate; the maximum voltage on the DRV pin is −0.3 V to VCC. |
| 7 | VCC | power_in | This pin accepts a supply voltage range from 8 V up to 28 V (28 V continuous maximum, 30 V transient for 10 ms with IVcc < 20 mA; maximum injected current 20 mA). |
| 8 | SSTART | passive | A capacitor connected to ground selects the soft-start duration; the soft start is grounded during the delay timer. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | onsemi |
| Package | SOIC-8 |
| Category | Power Management (PMIC) |
| Pins | 8 |
CAD (KiCad official)
- Symbol:
NCP1252DDR2G - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
ncp1252ddr2g-etched.step/ncp1252ddr2g-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ncp1252ddr2g.step/ncp1252ddr2g.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: onsemi datasheet (22 pp, sha256
e5ecd90123122b18, retrieved 2026-10-09, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# NCP1252DDR2G
**onsemi** · DC-DC Converters · SOIC-8
NCP1252DDR2G from onsemi, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | FB | input | This pin directly connects to an optocoupler collector and provides the feedback input. |
| 2 | BO | input | This Brown-out input monitors the input voltage image to offer Brown-out protection. |
| 3 | CS | input | The current sense pin monitors the primary current and allows selection of the ramp compensation amplitude. |
| 4 | RT | passive | A timing resistor connected to ground fixes the switching frequency (adjustable up to 500 kHz per the features list). |
| 5 | GND | power_in | This is the controller ground pin. |
| 6 | Drv | output | This driver pin connects to the MOSFET gate; the maximum voltage on the DRV pin is −0.3 V to VCC. |
| 7 | VCC | power_in | This pin accepts a supply voltage range from 8 V up to 28 V (28 V continuous maximum, 30 V transient for 10 ms with IVcc < 20 mA; maximum injected current 20 mA). |
| 8 | SSTART | passive | A capacitor connected to ground selects the soft-start duration; the soft start is grounded during the delay timer. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | onsemi |
| Package | SOIC-8 |
| Category | Power Management (PMIC) |
| Pins | 8 |
## CAD (KiCad official)
- Symbol: `NCP1252DDR2G`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files: `ncp1252ddr2g-etched.step` / `ncp1252ddr2g-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `ncp1252ddr2g.step` / `ncp1252ddr2g.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [onsemi datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588918356338884608) (22 pp, sha256 `e5ecd90123122b18`, retrieved 2026-10-09, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/ncp1252ddr2g-datasheet.pdf)