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NCP12400BBBBB2DR2G

Public Made by Adom

by adom

onsemi AC-DC Controllers & Regulators, SOIC-7. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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NCP12400BBBBB2DR2G

onsemi · AC-DC Controllers & Regulators · SOIC-7

NCP12400BBBBB2DR2G from onsemi, in a SOIC-7. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 FAULT input Fault input that stops the controller when pulled up or down, with an internal current source allowing direct connection of an NTC for over temperature detection; restart is autorecovery or latched depending on option.
2 FB input Feedback input where an optocoupler connected to ground controls output regulation, and pulling it to GND sends the part to the low consumption Off mode.
3 CS input Current sense input for the primary current in current-mode operation, offering overpower compensation adjustment and over voltage protection.
4 GND power_in The controller ground.
5 DRV output Drive output that drives the external MOSFET, with 300/500 mA source/sink peak current capability.
6 VCC power_in Supply pin accepting up to 28 Vdc with overvoltage detection, connected to an external auxiliary voltage.
8 HV passive High-voltage pin connecting to the rectified ac line for the start-up current source, self-supply, brown-out detection, X2 capacitor discharge and HV sensing for overpower protection; must not be connected to a dc voltage.

Key specifications

Parameter Value
Manufacturer onsemi
Package SOIC-7
Category Power Management ICs
Pins 7

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
DRV pin voltage -0.3 20 V DRV pin 5 5
VCC continuous voltage VCC -0.3 36 V VCC pin 6, continuous 5
HV pin voltage -0.3 750 V HV pin 8 5
Voltage on low power pins Vmax -0.3 5.5 V all pins except 5, 6, 8 5
Operating junction temperature TJMAX -40 150 °C 5
Storage temperature range TSTRGMAX -60 150 °C 5
Thermal resistance junction-to-air, low conductivity PCB RJ-A 162 °C/W SOIC-7, 50 mm2 copper 5
Thermal resistance junction-to-air, medium conductivity PCB RJ-A 147 °C/W SOIC-7, 100 mm2 copper 5
Thermal resistance junction-to-air, high conductivity PCB RJ-A 115 °C/W SOIC-7, 650 mm2 copper 5
Thermal resistance junction-to-case RJ-C 73 °C/W 5
Minimum voltage for current source operation VHV(min) 30 40 V 5
Current out of VCC pin, Istart1 Istart1 0.2 0.5 0.8 mA VCC = 0 V 5
Current out of VCC pin, Istart2 Istart2 5 8 11 mA VCC = VCC(on) - 0.5 V 5
Off-state leakage current Istart(off) 2 6 µA VHV = 750 V, VCC = 15 V 5
Turn-on threshold, VCC going up VCC(on) 11 12 13 V version-dependent; see review 5
HV current source restart threshold VCC(min) 9.5 10.5 11.5 V 5
Turn-off threshold VCC(off) 8.4 8.9 9.3 V 5
Overvoltage threshold (option BBBBB) VCC(ovp) 30 32 34 V option EAHBB, BBBBB 5
VCC reset level VCC(reset) 4.8 7 7.7 V VCC decreasing 6
VCC level for ISTART1 to ISTART2 transition VCC(inhibit) 1 2.1 3 V 6
Internal current consumption ICC1 ICC1 1 1.3 2 mA DRV open, VFB = 3 V, 65 kHz 6
Internal current consumption ICC2 ICC2 1.1 1.4 2.1 mA DRV open, VFB = 3 V, 100 kHz 6
Internal current consumption ICC3 ICC3 1.5 2.1 2.9 mA Cdrv = 1 nF, VFB = 3 V, 65 kHz 6
Internal current consumption ICC4 ICC4 2 2.6 3.4 mA Cdrv = 1 nF, VFB = 3 V, 100 kHz 6
Brown-out start threshold (option B) VHV(start) 102 111 120 V VHV going up 6
Brown-out stop threshold (option B) VHV(stop) 94 103 116 V VHV going down 6
X2 comparator hysteresis at HV pin VHV(hyst) 2 3 4 V 6
Timer duration for no line detection tDET 21 32 43 ms 6
Discharge timer duration tDIS 21 32 43 ms 6
Shunt regulator voltage at VCC during X2 discharge VCC(dis) 10 11 12 V 6
Oscillator frequency 65 kHz version fOSC 61 65 69 kHz 65 kHz version 6
Oscillator frequency 100 kHz version fOSC 94 100 110 kHz 100 kHz version 6
Maximum duty-ratio DMAX 75 80 85 % 6
Frequency jittering amplitude Ajitter -5 4 5 kHz printed ±3.0/±4.0/±5.0, percentage of FOSC 6
Frequency jittering modulation frequency Fjitter 85 125 165 Hz 6
FB threshold foldback start VFB(foldS) 2.4 2.5 2.6 V TJ = 25°C 6
FB threshold foldback complete VFB(foldE) 2.05 2.15 2.25 V TJ = 25°C 6
Minimum switching frequency fOSC(min) 25 28 31 kHz VFB = Vskip(in) + 0.1 6
Driver rise time trise 40 70 ns VCC = VCC(off) + 0.2 V, CDRV = 1 nF 7
Driver fall time tfall 30 60 ns VCC = VCC(off) + 0.2 V, CDRV = 1 nF 7
DRV source current IDRV(source) 300 mA DRV high, VDRV = 0 V 7
DRV sink current IDRV(sink) 500 mA DRV low, VDRV = VCC 7
DRV clamping voltage VDRV(clamp) 10 12 14 V VCC = VCC(ovp) - 0.2 V, DRV high, RDRV = 33 k, Cload = 220 pF 7
DRV high-state voltage drop VDRV(drop) 1 V VCC = VCC(min) + 0.2 V, RDRV = 33 k, DRV high 7
Maximum internal current setpoint VILIM 0.66 0.7 0.74 V VFB > 3.5 V 7
Propagation delay VIlimit to DRV off tdelay 50 70 ns VCS = VILIM 7
Leading edge blanking for VILIM tLEB 180 250 320 ns 7
CS threshold for immediate fault VCS(stop) 0.95 1.05 1.15 V 7
Soft-start duration tSSTART 3.2 4 4.8 ms From 1st pulse to VCS = VILIM, option A column (4 ms) 7
Frozen current setpoint (option B) VI(freeze) 100 150 200 mV option B 7
OVP threshold when DRV is low VOVP(CS) 1 1.05 1.1 V VCS going up 7
Internal pull-up resistor on FB RFB(up) 30 40 50 kΩ TJ = 25°C 7
Internal pull-up voltage on FB VFB(ref) 4.5 5 5.5 V 7
Skip-in feedback threshold Vskip(in) 0.9 1 1.1 V VFB going down, TJ = 25°C 7
Skip-out feedback threshold Vskip(out) 1.05 1.15 1.25 V VFB going up, TJ = 25°C 7
Fault timer duration tfault 108 128 178 ms 8
Autorecovery latch-off time tautorec 0.85 1 1.35 s 8
Fault input high threshold VOVP 2.43 2.5 2.57 V VLatch going up 8
Fault input low threshold VOTP 0.38 0.4 0.42 V VLatch going down, TJ = 25°C 8
Temperature shutdown TTSD 150 °C TJ going up 8

CAD (KiCad official)

  • Symbol: NCP12400BBBBB2DR2G
  • Footprint: Package_SO:SOIC-8-N7_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-7 (KiCad packages3D, STEP)
  • 3D model files: ncp12400bbbbb2dr2g-etched.step / ncp12400bbbbb2dr2g-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ncp12400bbbbb2dr2g.step / ncp12400bbbbb2dr2g.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: onsemi datasheet (47 pp, sha256 5b6a98e6b6537aad, retrieved 2026-10-23, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF