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Contents

README

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NCP1236BD100R2G

onsemi · Power Modules · SOIC-7

NCP1236BD100R2G from onsemi, in a SOIC-7. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 LATCH input Latch-off input: pull the pin up or down to latch off the controller, and an internal current source allows direct connection of an NTC for over-temperature detection.
2 FB input Feedback pin: an optocoupler collector to ground controls the output regulation.
3 CS input Current sense input that senses the primary current for current-mode operation and offers an overpower compensation adjustment.
4 GND power_in IC ground.
5 DRV output Drive output for the external MOSFET, with 500 mA peak source/sink current drive capability.
6 VCC power_in VCC supply input that accepts up to 28 Vdc, with overvoltage detection.
8 HV input High-voltage pin that connects to the bulk capacitor or rectified AC line to perform the start-up current source, Dynamic Self-Supply and brown-out detection functions.

Key specifications

Parameter Value
Manufacturer onsemi
Package SOIC-7
Category Power Management ICs
Pins 7

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply pin voltage range VCCMAX -0.3 28 V Pin 6 4
Supply pin current ICCMAX 30 mA Pin 6 4
HV pin voltage range VHVMAX -0.3 500 V Pin 8 4
HV pin current IHVMAX 20 mA Pin 8 4
Driver pin voltage range VDRVMAX -0.3 20 V Pin 5 4
Driver pin current IDRVMAX 1000 mA Pin 5 4
All other pins voltage range VMAX -0.3 10 V 4
All other pins current IMAX 10 mA 4
Operating junction temperature TJMAX -40 150 °C 4
Storage temperature range TSTRGMAX -60 150 °C 4
ESD Human Body Model 2000 V All pins except HV 4
ESD Machine Model 200 V 4
Thermal resistance junction-to-air, low conductivity PCB RθJ-A 162 °C/W Note 3, 50 mm2 copper 4
Thermal resistance junction-to-air, medium conductivity PCB RθJ-A 147 °C/W Note 4, 100 mm2 copper 4
Thermal resistance junction-to-air, high conductivity PCB RθJ-A 115 °C/W Note 5, 650 mm2 copper 4
Minimum voltage for current source operation VHV(min) 30 40 V 5
Current out of VCC pin Istart1 0.2 0.5 0.8 mA VCC = 0 V 5
Current out of VCC pin Istart2 3 6 9 mA VCC = VCC(on) − 0.5 V 5
Off-state leakage current Istart(off) 25 50 µA VHV = 500 V 5
Turn-on threshold level, VCC going up VCC(on) 11 12 13 V 5
HV current source restart threshold VCC(min) 9.5 10.5 11.5 V 5
Turn-off threshold VCC(off) 8.5 9.5 10.5 V 5
Overvoltage threshold VCC(ovp) 25 26.5 28 V 5
Blanking duration on VCC(off) and VCC(ovp) detection tVCC(blank) 7 10 13 µs Note 7 5
VCC level at which internal logic resets VCC(reset) 3.6 5 6 V VCC decreasing 5
VCC level for ISTART1 to ISTART2 transition VCC(inhibit) 0.4 1 1.6 V 5
Internal current consumption ICC1 1.2 1.9 2.3 mA DRV open, VFB = 3 V, 100 kHz 5
Internal current consumption ICC2 2.2 2.9 3.6 mA Cdrv = 1 nF, VFB = 3 V, 100 kHz 5
Internal current consumption ICC3 0.67 0.9 1.13 mA Off mode (skip or before start-up) 5
Internal current consumption ICC4 0.4 0.7 1 mA Fault mode (fault or latch) 5
Brown-out threshold VHV(start) 92 107 122 V VHV going up 5
Brown-out threshold VHV(stop) 79 92 105 V VHV going down 5
Timer duration for line cycle drop-out tHV 47 68 90 ms 5
Oscillator frequency fOSC 92 100 108 kHz 100 kHz version 5
Maximum duty cycle DMAX 75 80 85 % 5
Frequency jittering amplitude Ajitter 4 6 8 % percentage of FOSC 5
Frequency jittering modulation frequency Fjitter 85 125 165 Hz 5
Driver rise time trise 40 70 ns VCC = VCC(min) + 0.2 V, CDRV = 1 nF 5
Driver fall time tfall 40 70 ns VCC = VCC(min) + 0.2 V, CDRV = 1 nF 5
Driver clamping voltage VDRV(clamp) 11 13.5 16 V VCC = VCCmax, 0.2 V, DRV high, RDRV = 33 k, Cload = 220 pF 5
Driver high-state voltage drop VDRV(drop) 1 V VCC = VCC(min) + 0.2 V, RDRV = 33 k, DRV high 6
Maximum internal current setpoint VILIM 0.66 0.7 0.74 V VFB > 3.5 V 6
Propagation delay from VIlimit detection to DRV off tdelay 80 110 ns VCS = VILIM 6
Leading edge blanking duration for VILIM tLEB 190 250 310 ns 6
Threshold for immediate fault protection activation VCS(stop) 0.95 1.05 1.15 V 6
Leading edge blanking duration for VCS(stop) tBCS 90 120 150 ns 6
Soft-start duration tSSTART 2.8 4 5.2 ms From 1st pulse to VCS = VILIM 6
Current flowing out of CS pin IOPC(365) 105 130 150 µA VHV = 365 V 6
FB voltage above which IOPC is applied VFB(OPCF) 2.12 2.35 2.58 V VHV = 365 V 6
Internal pull-up resistor RFB(up) 15 20 25 kΩ TJ = 25°C 6
VFB to internal current setpoint division ratio KFB 4.7 5 5.3 6
Internal pull-up voltage on the FB pin VFB(ref) 4.3 5 5.7 V 6
Fault timer duration tfault 98 128 168 ms From CS reaching VILIMIT to DRV stop 6
Autorecovery mode latch-off time duration tautorec 0.85 1 1.35 s 6
FB threshold below which frequency foldback starts VFB(foldS) 1.8 2 2.2 V 7
FB threshold below which frequency foldback is complete VFB(foldE) 1.22 1.35 1.48 V 7
Minimum switching frequency fOSC(min) 22 27 32 kHz VFB = Vskip(in) + 0.2 7
Skip mode FB threshold Vskip(in) 0.63 0.7 0.77 V VFB going down 7
Skip mode FB threshold Vskip(out) 0.72 0.8 0.88 V VFB going up 7
Latch high threshold VOVP 2.35 2.5 2.65 V VLatch going up 7
Latch low threshold VOTP 0.76 0.8 0.84 V VLatch going down 7
Current source for direct NTC connection INTC 65 95 105 µA During normal operation, VLatch = 0 V 7
Current source for direct NTC connection during soft-start INTC(SSTART) 130 190 210 µA During soft-start, VLatch = 0 V 7
Blanking duration on high latch detection tLatch(OVP) 25 35 45 µs 100 kHz version 7
Latch clamping voltage Vclamp0(Latch) 1 1.2 1.4 V ILatch = 0 mA 7
Latch clamping voltage Vclamp1(Latch) 2 2.4 3 V ILatch = 1 mA 7
Temperature shutdown TTSD 135 150 165 °C TJ going up, Note 7 7
Temperature shutdown hysteresis TTSD(HYS) 20 30 40 °C TJ going down, Note 7 7

CAD (KiCad official)

  • Symbol: NCP1236BD100R2G
  • Footprint: Package_SO:SOIC-8-N7_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-7 (KiCad packages3D, STEP)
  • 3D model files: ncp1236bd100r2g-etched.step / ncp1236bd100r2g-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ncp1236bd100r2g.step / ncp1236bd100r2g.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: onsemi datasheet (36 pp, sha256 f7db3447f3c96b4d, retrieved 2026-10-23, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF