# NCP1117LPST50T3G-MS

**MSKSEMI** · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-223

NCP1117LPST50T3G-MS from MSKSEMI, in a SOT-223. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GND | power_in | Ground pin for the fixed-output (5.0 V) variant, the reference return for the regulator. |
| 2 | Vout | power_out | Regulated output pin; the 5.0 V fixed-output variant supplies up to 1 A maximum output current. |
| 3 | Vin | power_in | Input pin; the datasheet gives a maximum input voltage of 18 V. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | MSKSEMI |
| Package | SOT-223 |
| Category | Power Management (PMIC) |
| Pins | 3 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Output voltage (NCP1117LPST50T3G-MS, 5.0V) | Vout | 4.9 | 5 | 5.1 | V |  | 4 |
| Quiescent current (NCP1117LPST50T3G-MS) | Iq |  |  | 12 | mA | Vin = 4.8V | 5 |
| Minimum input-output voltage difference | Vin-Vout |  |  | 1.4 | V | ∆Vout, ∆Vref=1%, Iout=1A | 5 |
| Maximum input voltage | Vin |  |  | 18 | V |  | 3 |
| Maximum junction temperature | TJ |  |  | 125 | ℃ |  | 3 |
| Maximum ambient temperature | TA |  |  | 125 | ℃ |  | 3 |
| Storage temperature | Ts | -65 |  | 150 | ℃ |  | 3 |
| Soldering temperature |  |  |  | 300 | ℃ | 10 s | 3 |
| Input voltage range (recommended) |  |  |  | 15 | V |  | 3 |
| Operating ambient temperature (recommended) |  | 0 |  | 125 | ℃ |  | 3 |

## CAD (KiCad official)

- Symbol: `NCP1117LPST50T3G-MS`
- Footprint: `Package_TO_SOT_SMD:SOT-223-3_TabPin2`
- 3D model: SOT-223 (KiCad packages3D, STEP)
- 3D model files: `ncp1117lpst50t3g-ms-etched.step` / `ncp1117lpst50t3g-ms-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `ncp1117lpst50t3g-ms.step` / `ncp1117lpst50t3g-ms.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [MSKSEMI datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8603371726668001280) (7 pp, sha256 `41af5081e1107478`, retrieved 2026-10-18, tier: lcsc)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/ncp1117lpst50t3g-ms-datasheet.pdf)