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NCP110AFCT180T2G

Public Made by Adom

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onsemi Linear Voltage Regulators (LDO), WLCSP-4(0.64x0.64). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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NCP110AFCT180T2G

onsemi · Linear Voltage Regulators (LDO) · WLCSP-4(0.64x0.64)

NCP110AFCT180T2G from onsemi, in a WLCSP-4(0.64x0.64). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
A1 IN power_in Input voltage supply pin, operating range 1.1 V to 5.5 V.
A2 OUT power_out Regulated output voltage, to be bypassed with a small 1 µF ceramic capacitor.
B1 EN input Chip enable: VEN < 0.2 V disables the regulator and VEN > 0.7 V enables the LDO.
B2 GND power_in Common ground connection.

Key specifications

Parameter Value
Manufacturer onsemi
Package WLCSP-4(0.64x0.64)
Category Power Management ICs
Pins 4

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Operating Input Voltage VIN 1.1 5.5 V 3
Output Voltage Accuracy VOUT -2 2 % VIN = VOUT(NOM) + 0.3 V (VIN ≥ 1.1 V), VOUT(NOM) > 1.5 V 3
Dropout Voltage VDO 65 120 mV VOUT(NOM) = 1.80 V, IOUT = 200 mA 3
Output Current Limit ICL 225 300 mA VOUT = 90% VOUT(NOM) 3
Short Circuit Current ISC 300 mA VOUT = 0 V 3
Quiescent Current IQ 20 25 µA IOUT = 0 mA 3
Shutdown Current IDIS 0.01 1 µA VEN ≤ 0.2 V, VIN = 1.1 V 3
EN Input Voltage High VENH 0.7 V 3
EN Input Voltage Low VENL 0.2 V 3
EN Pull Down Current IEN 0.2 0.5 µA VEN = 1.1 V 3
Line Regulation LineReg 0.02 %/V VOUT(NOM) + 0.5 V ≤ VIN ≤ 5.5 V, (VIN ≥ 1.1 V) 3
Load Regulation LoadReg 0.001 %/mA IOUT = 1 mA to 200 mA 3
Turn-On Time tON 120 µs COUT = 1 µF, from assertion of VEN to VOUT = 95% VOUT(NOM) 3
Output Voltage Noise VN 8.8 µVRMS f = 10 Hz to 100 kHz 3
Thermal Shutdown Threshold TSDH 160 °C Temperature rising 3
Thermal Shutdown Release TSDL 140 °C Temperature falling 3
Active Output Discharge Resistance RDIS 280 Ω VEN < 0.2 V, Version A only 3
Input Voltage VIN -0.3 6 V 2
Output Voltage VOUT -0.3 6 V -0.3 to VIN + 0.3, max. 6 V 2
Chip Enable Input VCE -0.3 6 V 2
Maximum Junction Temperature TJ 150 °C 2
Storage Temperature TSTG -55 150 °C 2
ESD Capability, Human Body Model ESDHBM 2000 V 2
ESD Capability, Machine Model ESDMM 200 V 2
Thermal Resistance, Junction-to-Air, CSP4 RθJA 108 °C/W JEDEC JESD51-7 board 2

CAD (KiCad official)

  • Symbol: NCP110AFCT180T2G
  • Footprint: Package_CSP:WLCSP-4_0.64x0.64mm_Layout2x2_P0.35mm
  • 3D model: WLCSP-4(0.64x0.64), generated from the KiCad footprint (body from the F.Fab outline, terminals on the pads, 0.35 mm nominal DSBGA height). Neither the vendor nor KiCad ships a 3D model for this package, so the dimensions are nominal, not the manufacturer's CAD (STEP)
  • 3D model files: ncp110afct180t2g-etched.step / ncp110afct180t2g-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ncp110afct180t2g.step / ncp110afct180t2g.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: onsemi datasheet (16 pp, sha256 362182bfea676a69, retrieved 2026-10-26, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF