component
NCP1034DR2G
Public Made by Adomby adom
onsemi DC-DC Converters, SOIC-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
NCP1034DR2G
onsemi · DC-DC Converters · SOIC-16
NCP1034DR2G from onsemi, in a SOIC-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | OCset | input | Current limit set point: a resistor from this pin to GND sets the positive and negative current limit threshold. |
| 2 | FB | input | Inverting input to the error amplifier, connected to the regulator output through a resistor divider to set the output voltage. |
| 3 | COMP | output | Error amplifier output, normally loaded with an external resistor and capacitor network to ground for loop compensation. |
| 4 | SS/SD | bidirectional | Soft-start and shutdown: an external capacitor to ground sets the output startup time, and pulling this pin below 0.3 V shuts the converter down. |
| 5 | SYNC | bidirectional | Synchronizes the internal oscillator to an external clock or outputs the internal oscillator sync to other controllers; if unused it should be connected to ground through a 10 k resistor. |
| 6 | PGND | power_in | Power ground serving as a separate ground for the MOSFET driver, to be connected to the system power ground plane. |
| 7 | LDRV | output | Output driver for the low-side MOSFET; absolute maximum is VCC + 0.3 V. |
| 8 | DRVVCC | power_in | Supplies bias to the internal low-side driver; a minimum 0.1 F high-frequency capacitor must be connected from this pin to power ground, and the recommended supply is 10 to 18 V. |
| 9 | VB | power_in | Supplies the high-side driver, must be held higher than the input voltage, and requires a minimum 0.1 F high-frequency capacitor from this pin to the switch node (VS); recommended VB-to-VS supply is 10 to 18 V. |
| 10 | HDRV | output | Output driver for the high-side MOSFET; absolute maximum range is VS − 0.3 V to VB + 0.3 V. |
| 11 | VS | power_in | Switch node connected to the source of the upper MOSFET and drain of the lower MOSFET; absolute maximum range is −1.0 V to 150 V, and it is the return path for the upper gate driver. |
| 12 | VCC | power_in | Supplies power to the internal blocks; a minimum 0.1 F high-frequency capacitor must be connected from this pin to ground, and the recommended supply is 10 to 18 V. |
| 13 | OCIN | input | Overcurrent sensing input; a serial resistor from this pin to the drain of the low-side MOSFET must be used to limit the current into the pin (input current maximum 20 mA). |
| 14 | GND | power_in | Signal ground for the internal reference and control circuitry; all voltages are referenced to this pin. |
| 15 | RT | passive | A resistor from this pin to ground sets the oscillator frequency (programmable 25 kHz to 500 kHz). |
| 16 | UVLO | input | An external voltage divider sets the undervoltage lockout threshold levels; absolute maximum voltage is 10 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | onsemi |
| Package | SOIC-16 |
| Category | Power Management (PMIC) |
| Pins | 16 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Feedback Voltage Accuracy | -1.5 | 1.5 | % | −40°C < TJ < 125°C | 5 | ||
| VCC Supply Current (Stat) | ICC(Static) | 2 | 3 | mA | SS = 0 V, No Switching, RT = 10 k, ROCSET = 10 k | 5 | |
| DRVVCC Supply Current (Stat) | IC(Static) | 0.1 | 0.3 | mA | SS = 0 V, No Switching | 5 | |
| VB Supply Current (Stat) | IB(Static) | 0.1 | 0.3 | mA | SS = 0 V, No Switching | 5 | |
| VCC−Start−Threshold | VCC_UVLO (R) | 7.9 | 8.9 | 9.8 | V | Supply Ramping Up | 5 |
| VCC−Stop−Threshold | VCC_UVLO (F) | 7.3 | 8.2 | 9 | V | Supply Ramping Down | 5 |
| DRVCC−Start−Threshold | DRVCC_UVLO (R) | 7.9 | 8.9 | 9.8 | V | Supply Ramping Up | 5 |
| DRVCC−Stop−Threshold | DRVCC_UVLO (F) | 7.3 | 8.2 | 9 | V | Supply Ramping Down | 5 |
| VB−Start−Threshold | VB_UVLO (R) | 7.9 | 8.9 | 9.8 | V | Supply Ramping Up | 5 |
| VB−Stop−Threshold | VB_UVLO (F) | 7.3 | 8.2 | 9 | V | Supply Ramping Down | 5 |
| Undervoltage Threshold Value (Rising) | UUVLO (Rising) | 1.19 | 1.25 | 1.31 | V | 5 | |
| Undervoltage Threshold Value (Falling) | UUVLO (Falling) | 1.1 | 1.15 | 1.2 | V | 5 | |
| Oscillator Frequency | FS | 170 | 200 | 230 | kHz | RT = 20 k | 5 |
| Oscillator Frequency | FS | 320 | 375 | 430 | kHz | RT = 10 k | 5 |
| Source/Sink Current | I(Source/Sink) | 50 | 100 | 120 | A | 6 | |
| Transconductance | gm | 1500 | 3150 | 4000 | mho | 6 | |
| Soft-Start Current | ISS | 15 | 20 | 25 | A | SS = 0 V | 6 |
| Dead Band Time | tdead | 30 | 60 | 120 | ns | See Figure 3 | 6 |
| Voltage on FB, VUVLO, RT, OCset | FB, VUVLO, RT, OCset | -0.3 | 10 | V | All voltages referenced to GND | 4 | |
| Voltage on COMP, SS/SD, SYNC, OCIN | COMP, SS/SD, SYNC, OCIN | -0.3 | 5 | V | All voltages referenced to GND | 4 | |
| Voltage on LDRV | LDRV | -0.3 | V | All voltages referenced to GND | 4 | ||
| Voltage on DRVVCC, VCC | DRVVCC, VCC | -0.3 | 20 | V | All voltages referenced to GND | 4 | |
| Voltage on VS | VS | -1 | 150 | V | All voltages referenced to GND | 4 | |
| OCin Input Current | OCin | 20 | mA | 4 | |||
| Operating Ambient Temperature Range | TA | -40 | 125 | °C | 4 | ||
| Storage Temperature Range | TSTG | -55 | 150 | °C | 4 | ||
| Junction Operating Temperature | TJ | -40 | 150 | °C | 4 | ||
| ESD Withstand Voltage, Human Body Model | VESD | 2000 | V | Human Body Model; excluding pins VB, VS, HDRV (Note 1) | 4 | ||
| ESD Withstand Voltage, Machine Model | VESD | 200 | V | Machine Model; excluding pins VB, VS, HDRV (Note 1) | 4 | ||
| VIN Converting Voltage | VIN | 100 | V | 4 | |||
| VCC Supply Voltage | VCC | 10 | 18 | V | 4 | ||
| DRVCC Supply Voltage | DRVCC | 10 | 18 | V | 4 | ||
| VB to VS Supply Voltage | 10 | 18 | V | 4 | |||
| Operating Frequency | FSW | 25 | 500 | kHz | 4 | ||
| Junction Temperature (recommended) | TJ | -40 | 125 | °C | 4 | ||
| Thermal Resistance, Junction-to-Ambient | RJA | 130 | °C/W | 4 |
CAD (KiCad official)
- Symbol:
NCP1034DR2G - Footprint:
Package_SO:SOIC-16_3.9x9.9mm_P1.27mm - 3D model: SOIC-16 (KiCad packages3D, STEP)
- 3D model files:
ncp1034dr2g-etched.step/ncp1034dr2g-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ncp1034dr2g.step/ncp1034dr2g.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: onsemi datasheet (24 pp, sha256
a1494b03e349b98d, retrieved 2026-10-19, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# NCP1034DR2G
**onsemi** · DC-DC Converters · SOIC-16
NCP1034DR2G from onsemi, in a SOIC-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | OCset | input | Current limit set point: a resistor from this pin to GND sets the positive and negative current limit threshold. |
| 2 | FB | input | Inverting input to the error amplifier, connected to the regulator output through a resistor divider to set the output voltage. |
| 3 | COMP | output | Error amplifier output, normally loaded with an external resistor and capacitor network to ground for loop compensation. |
| 4 | SS/SD | bidirectional | Soft-start and shutdown: an external capacitor to ground sets the output startup time, and pulling this pin below 0.3 V shuts the converter down. |
| 5 | SYNC | bidirectional | Synchronizes the internal oscillator to an external clock or outputs the internal oscillator sync to other controllers; if unused it should be connected to ground through a 10 k resistor. |
| 6 | PGND | power_in | Power ground serving as a separate ground for the MOSFET driver, to be connected to the system power ground plane. |
| 7 | LDRV | output | Output driver for the low-side MOSFET; absolute maximum is VCC + 0.3 V. |
| 8 | DRVVCC | power_in | Supplies bias to the internal low-side driver; a minimum 0.1 F high-frequency capacitor must be connected from this pin to power ground, and the recommended supply is 10 to 18 V. |
| 9 | VB | power_in | Supplies the high-side driver, must be held higher than the input voltage, and requires a minimum 0.1 F high-frequency capacitor from this pin to the switch node (VS); recommended VB-to-VS supply is 10 to 18 V. |
| 10 | HDRV | output | Output driver for the high-side MOSFET; absolute maximum range is VS − 0.3 V to VB + 0.3 V. |
| 11 | VS | power_in | Switch node connected to the source of the upper MOSFET and drain of the lower MOSFET; absolute maximum range is −1.0 V to 150 V, and it is the return path for the upper gate driver. |
| 12 | VCC | power_in | Supplies power to the internal blocks; a minimum 0.1 F high-frequency capacitor must be connected from this pin to ground, and the recommended supply is 10 to 18 V. |
| 13 | OCIN | input | Overcurrent sensing input; a serial resistor from this pin to the drain of the low-side MOSFET must be used to limit the current into the pin (input current maximum 20 mA). |
| 14 | GND | power_in | Signal ground for the internal reference and control circuitry; all voltages are referenced to this pin. |
| 15 | RT | passive | A resistor from this pin to ground sets the oscillator frequency (programmable 25 kHz to 500 kHz). |
| 16 | UVLO | input | An external voltage divider sets the undervoltage lockout threshold levels; absolute maximum voltage is 10 V. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | onsemi |
| Package | SOIC-16 |
| Category | Power Management (PMIC) |
| Pins | 16 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Feedback Voltage Accuracy | | -1.5 | | 1.5 | % | −40°C < TJ < 125°C | 5 |
| VCC Supply Current (Stat) | ICC(Static) | | 2 | 3 | mA | SS = 0 V, No Switching, RT = 10 k, ROCSET = 10 k | 5 |
| DRVVCC Supply Current (Stat) | IC(Static) | | 0.1 | 0.3 | mA | SS = 0 V, No Switching | 5 |
| VB Supply Current (Stat) | IB(Static) | | 0.1 | 0.3 | mA | SS = 0 V, No Switching | 5 |
| VCC−Start−Threshold | VCC_UVLO (R) | 7.9 | 8.9 | 9.8 | V | Supply Ramping Up | 5 |
| VCC−Stop−Threshold | VCC_UVLO (F) | 7.3 | 8.2 | 9 | V | Supply Ramping Down | 5 |
| DRVCC−Start−Threshold | DRVCC_UVLO (R) | 7.9 | 8.9 | 9.8 | V | Supply Ramping Up | 5 |
| DRVCC−Stop−Threshold | DRVCC_UVLO (F) | 7.3 | 8.2 | 9 | V | Supply Ramping Down | 5 |
| VB−Start−Threshold | VB_UVLO (R) | 7.9 | 8.9 | 9.8 | V | Supply Ramping Up | 5 |
| VB−Stop−Threshold | VB_UVLO (F) | 7.3 | 8.2 | 9 | V | Supply Ramping Down | 5 |
| Undervoltage Threshold Value (Rising) | UUVLO (Rising) | 1.19 | 1.25 | 1.31 | V | | 5 |
| Undervoltage Threshold Value (Falling) | UUVLO (Falling) | 1.1 | 1.15 | 1.2 | V | | 5 |
| Oscillator Frequency | FS | 170 | 200 | 230 | kHz | RT = 20 k | 5 |
| Oscillator Frequency | FS | 320 | 375 | 430 | kHz | RT = 10 k | 5 |
| Source/Sink Current | I(Source/Sink) | 50 | 100 | 120 | A | | 6 |
| Transconductance | gm | 1500 | 3150 | 4000 | mho | | 6 |
| Soft-Start Current | ISS | 15 | 20 | 25 | A | SS = 0 V | 6 |
| Dead Band Time | tdead | 30 | 60 | 120 | ns | See Figure 3 | 6 |
| Voltage on FB, VUVLO, RT, OCset | FB, VUVLO, RT, OCset | -0.3 | | 10 | V | All voltages referenced to GND | 4 |
| Voltage on COMP, SS/SD, SYNC, OCIN | COMP, SS/SD, SYNC, OCIN | -0.3 | | 5 | V | All voltages referenced to GND | 4 |
| Voltage on LDRV | LDRV | -0.3 | | | V | All voltages referenced to GND | 4 |
| Voltage on DRVVCC, VCC | DRVVCC, VCC | -0.3 | | 20 | V | All voltages referenced to GND | 4 |
| Voltage on VS | VS | -1 | | 150 | V | All voltages referenced to GND | 4 |
| OCin Input Current | OCin | | | 20 | mA | | 4 |
| Operating Ambient Temperature Range | TA | -40 | | 125 | °C | | 4 |
| Storage Temperature Range | TSTG | -55 | | 150 | °C | | 4 |
| Junction Operating Temperature | TJ | -40 | | 150 | °C | | 4 |
| ESD Withstand Voltage, Human Body Model | VESD | | | 2000 | V | Human Body Model; excluding pins VB, VS, HDRV (Note 1) | 4 |
| ESD Withstand Voltage, Machine Model | VESD | | | 200 | V | Machine Model; excluding pins VB, VS, HDRV (Note 1) | 4 |
| VIN Converting Voltage | VIN | | | 100 | V | | 4 |
| VCC Supply Voltage | VCC | 10 | | 18 | V | | 4 |
| DRVCC Supply Voltage | DRVCC | 10 | | 18 | V | | 4 |
| VB to VS Supply Voltage | | 10 | | 18 | V | | 4 |
| Operating Frequency | FSW | 25 | | 500 | kHz | | 4 |
| Junction Temperature (recommended) | TJ | -40 | | 125 | °C | | 4 |
| Thermal Resistance, Junction-to-Ambient | RJA | | 130 | | °C/W | | 4 |
## CAD (KiCad official)
- Symbol: `NCP1034DR2G`
- Footprint: `Package_SO:SOIC-16_3.9x9.9mm_P1.27mm`
- 3D model: SOIC-16 (KiCad packages3D, STEP)
- 3D model files: `ncp1034dr2g-etched.step` / `ncp1034dr2g-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `ncp1034dr2g.step` / `ncp1034dr2g.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [onsemi datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8586194365127933952) (24 pp, sha256 `a1494b03e349b98d`, retrieved 2026-10-19, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/ncp1034dr2g-datasheet.pdf)