component
NCN5151MNTWG
Public Made by Adomby adom
onsemi Interface - Specialized, QFN-20-EP(4x4). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
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NCN5151MNTWG
onsemi · Interface - Specialized · QFN-20-EP(4x4)
NCN5151MNTWG from onsemi, in a QFN-20-EP(4x4). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GND | power_in | Ground reference for the device; all voltages in the datasheet are referenced to GND. |
| 2 | BUSL1 | passive | Bus line connection made through series resistors (typically two 220 Ω); connections are polarity independent and the absolute maximum bus voltage |
| 3 | BUSL2 | passive | Bus line connection made through series resistors (typically two 220 Ω); connections are polarity independent and the absolute maximum bus voltage |
| 4 | VB | power_out | Rectified bus voltage from the internal bridge rectifier; the VB monitor enables PMODE at 8.0 V to 10.5 V (9.4 V typical). |
| 5 | PMODE | output | Power mode output indicating the VB voltage level; the absolute maximum voltage on this pin is 3.6 V and its high level is VDD − 0.3 V minimum. |
| 6 | STC | output | Storage capacitor pin to be connected to a bulk storage capacitor (typically 100 to 470 µF, minimum 10 µF), clamped by a shunt regulator to VSTC. |
| 7 | RIDD | input | Mark current adjustment pin to be connected to the programming resistor; the voltage on RIDD is 1.15 V to 1.25 V (1.2 V typical). |
| 8 | PF | output | Active-low power-fail output that is disabled in low power mode; its high level is VIO − 0.6 V minimum and it is pulled to ground during 2WLPM or 3WLPM operation. |
| 9 | SC | output | Mark bus voltage level storage capacitor pin to be connected to a ceramic capacitor (typically 220 nF, range 100 nF to 330 nF). |
| 10 | 2WLPM | input | 2-wire low power mode selection input; the high level is 0.8 × VDD minimum to VDD, and the absolute maximum voltage is 3.6 V. |
| 11 | TXI | output | Inverted UART data output; the high level is VIO − 0.6 V minimum and the low level is 0.35 V maximum at 100 µA. |
| 12 | TX | output | UART data output; the high level is VIO − 0.6 V minimum and the low level is 0.35 V maximum at 100 µA. |
| 13 | VIO | input | I/O supply pin that sets the high level of RX, RXI, TX, TXI and PF; the VIO pin voltage range is 2.5 V to 3.8 V. |
| 14 | NC | unconnected | Leave this pin floating. |
| 15 | 3WLPM | input | 3-wire low power mode selection input; the high level is 0.8 × VDD minimum to VDD, and the absolute maximum voltage is 3.6 V. |
| 16 | VDD | power_out | Output of the integrated 3.3 V LDO regulator (3.1 V to 3.6 V, peak 15 mA); connect to a minimum 1 µF decoupling capacitor. |
| 17 | RX | input | UART data input; the high level is VIO − 0.8 V minimum to 5.5 V and the low level is 0 V to 0.8 V. |
| 18 | RXI | input | Inverted UART data input; the high level is VIO − 0.8 V minimum to 5.5 V and the low level is 0 V to 0.8 V. |
| 19 | OD | output | Open-drain output (active low) used for slave-to-master communication in 3-wire low power mode; the absolute maximum voltage is 40 V and the current is limited to 20 mA. |
| 20 | RIS | input | Modulation current adjustment pin; with RRIS = 100 Ω the typical modulation current IMC is 15 mA (12.5 mA to 18 mA), and the RIS voltage is 1.2 V to 1.6 V. |
| 21 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | onsemi |
| Package | QFN-20-EP(4x4) |
| Category | Communication Interface Chip/UART/485/232 |
| Pins | 21 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Ambient temperature | TA | -40 | 85 | °C | 4 | ||
| Bus voltage, M-Bus mode 1-2 UL | VBUS | 9.2 | 42 | V | M-Bus mode 1-2 UL | 4 | |
| Bus voltage, M-Bus mode 3-6 UL | VBUS | 9.7 | 42 | V | M-Bus mode 3-6 UL | 4 | |
| Bus voltage, 2 and 3-Wire Low Power Mode 1-2 UL | VBUS | 4.75 | 10 | V | 2 and 3-Wire Low Power Mode 1-2 UL | 4 | |
| VSTC in Low Power Mode | VSTC,LP | 3.8 | V | to guarantee min VDD of 3.1 V @ IDD = 15 mA peak | 4 | ||
| VIO pin voltage | VIO | 2.5 | 3.8 | V | 4 | ||
| OD pin voltage | VOD | 0 | 10 | V | 4 | ||
| Latch-up | LU | -100 | 100 | mA | EIA/JESD78 | 4 | |
| Junction temperature | TJ | -40 | 150 | °C | 4 | ||
| Storage temperature | TS | -55 | 150 | °C | 4 | ||
| Bus voltage | VBUS | -50 | 50 | V | /BUSL1 − BUSL2/ | 4 | |
| Voltage on pin TX, TXI | VTX, VTXI | -0.3 | 7.5 | V | 4 | ||
| Voltage on pin RX, RXI, VIO | VRX, VRXI, VIO | -0.3 | 5.5 | V | 4 | ||
| Voltage on pin OD | VOD | -0.3 | 40 | V | 4 | ||
| Voltage on pin 3WLPM | V3WLPM | -0.3 | 3.6 | V | 4 | ||
| Voltage on pin 2WLPM | V2WLPM | -0.3 | 3.6 | V | 4 | ||
| Voltage on pin PMODE | VPMODE | -0.3 | 3.6 | V | 4 | ||
| Voltage drop over bus rectifier (VBUS − VB) | ΔVBR | 1.25 | V | with RIDD = 4.02 k | 5 | ||
| Voltage drop over CS1 (VB − VSTC) | ΔVCS | 1.3 | V | RIDD ≤ 13 k | 5 | ||
| Voltage drop over CS1 (VB − VSTC) | ΔVCS | 1.7 | V | RIDD ≤ 4.02 k | 5 | ||
| Total current drawn from the bus, Mark State | IBUS | 1.3 | 1.5 | mA | RIDD = 30 k | 5 | |
| Total current drawn from the bus, Mark State | IBUS | 2.7 | 3 | mA | RIDD = 13 k | 5 | |
| Total current drawn from the bus, Mark State | IBUS | 4.1 | 4.5 | mA | RIDD = 8.45 k | 5 | |
| Total current drawn from the bus, Mark State | IBUS | 5.5 | 6 | mA | RIDD = 6.19 k | 5 | |
| Total current drawn from the bus, Mark State | IBUS | 6.8 | 7.5 | mA | RIDD = 4.87 k | 5 | |
| Total current drawn from the bus, Mark State | IBUS | 8.2 | 9 | mA | RIDD = 4.02 k | 5 | |
| Bus current stability | ΔIBUS | 0.2 | 2 | % | over ΔVBUS = 10 V, RX/RXI = mark | 5 | |
| Idle current available from STC and VDD | ISTC | 0.88 | 1 | 1.2 | mA | RIDD = 30 k | 5 |
| Idle current available from STC and VDD | ISTC | 2.1 | 2.3 | 2.6 | mA | RIDD = 13 k | 5 |
| Idle current available from STC and VDD | ISTC | 3.1 | 3.6 | 4 | mA | RIDD = 8.45 k | 5 |
| Idle current available from STC and VDD | ISTC | 4.2 | 4.8 | 5.4 | mA | RIDD = 6.19 k | 5 |
| Idle current available from STC and VDD | ISTC | 5.3 | 6.1 | 6.9 | mA | RIDD = 4.87 k | 5 |
| Idle current available from STC and VDD | ISTC | 6.5 | 7.4 | 8.4 | mA | RIDD = 4.02 k | 5 |
| PF voltage low | VPF, OL | 0 | 0.6 | V | Note 6; IPF = 50 A | 5 | |
| Voltage drop over bus rectifier, low power mode | ΔVBR,LP | 0.35 | V | with IBUS = 3 mA and external Schottky diodes (Note 8) | 5 | ||
| Max current available from STC and VDD, low power mode | ISTC,LP | 2 | 2.3 | 2.7 | mA | RIDD (Note 9) = 30 k | 5 |
| Max current available from STC and VDD, low power mode | ISTC,LP | 4.1 | 4.8 | 5.5 | mA | RIDD (Note 9) = 13 k | 5 |
| Clamp voltage on pin STC | VSTC,CLAMP,LP | 9.4 | 10.5 | 11.5 | V | IDD < ISTC (Note 11) | 5 |
| Internal supply current | ICC | 250 | 500 | A | RIDD (Note 13) = 13k, RX/RXI = mark | 5 | |
| Current drawn by the VIO pin | IIO | -0.5 | 0.5 | A | 5 | ||
| Voltage on RIDD pin | VRIDD | 1.15 | 1.2 | 1.25 | V | 5 | |
| VDD regulator output voltage | VDD | 3.1 | 3.3 | 3.6 | V | IDD < 15 mA | 6 |
| Peak current that can be supplied by VDD | IDD | 15 | mA | with condition VSTC > 3.8 V | 6 | ||
| VDD off-state current | IDD, OFF | -0.5 | 0.5 | A | VBUS = 0 V, VSTC = 0 V | 6 | |
| Power-on reset threshold to connect VDD | VPOR, ON | 2.65 | 2.85 | 3.15 | V | 6 | |
| Power-on reset threshold to disconnect VDD | VPOR, OFF | 2.55 | 2.75 | 3 | V | 6 | |
| Threshold voltage on pin STC to turn on VDD regulator, M-Bus mode | VSTC,VDDON | 5.6 | 6 | 6.4 | V | PMODE high (VB > 10.6 V), M-Bus Mode | 6 |
| Threshold voltage on pin STC to turn on VDD regulator, low power mode | VSTC,VDDON | 3.1 | 3.4 | 3.6 | V | PMODE low (VB < 10.6 V), Low Power Mode | 6 |
| Threshold voltage on pin STC to turn off VDD regulator | VSTC,VDDOFF | 2.7 | 3 | 3.2 | V | 6 | |
| Mark level storage capacitor charge current | ISC, charge | -40 | -25 | -15 | A | 6 | |
| TX/TXI low-level voltage | VTXI,OL1, VTX,OL1 | 0 | 0.2 | 0.35 | V | ITX/ITXI = 100 A | 6 |
| TX/TXI pin current | ITX, ITXI | 0 | 11 | 16 | A | VTX = 7.5 V, VSTC = 6 V | 6 |
| Receiver low threshold voltage (falling VBUS) | VTL,LP | 1.2 | 1.6 | 2.4 | V | Falling VBUS | 6 |
| Receiver high threshold voltage (rising VBUS) | VTH,LP | 1.5 | 2 | 2.7 | V | Rising VBUS | 6 |
| Space level modulating current | IMC | 12.5 | 15 | 18 | mA | RRIS = 100 (Note 20) | 7 |
| Voltage on RIS pin | VRIS | 1.2 | 1.4 | 1.6 | V | 7 | |
| Transmission current, 2-wire low power mode | ITX,2WLPM | 8.5 | 10 | 11.5 | mA | RRIS = 100 (Note 23) | 7 |
| OD low-level output voltage | VOD,OL | 0 | 0.1 | 0.3 | V | IOD = 2 mA | 7 |
| VB voltage level to enable PMODE pin | VVB,PMODE | 8 | 9.4 | 10.5 | V | 7 | |
| Thermal resistance, junction-to-air | RJA | 38 | °C/W | 2S2P test boards per JEDEC JESD51 | 4 |
CAD (KiCad official)
- Symbol:
NCN5151MNTWG - Footprint:
Package_DFN_QFN:QFN-20-1EP_4x4mm_P0.5mm_EP2.5x2.5mm - 3D model: QFN-20-EP(4x4) (KiCad packages3D, STEP)
- 3D model files:
ncn5151mntwg-etched.step/ncn5151mntwg-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ncn5151mntwg.step/ncn5151mntwg.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: onsemi datasheet (21 pp, sha256
c25c805204fe54eb, retrieved 2026-10-30, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).