component
NCN5121MNTWG
Public Made by Adomby adom
onsemi Interface - Specialized, QFN-40-EP(6x6). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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NCN5121MNTWG
onsemi · Interface - Specialized · QFN-40-EP(6x6)
NCN5121MNTWG from onsemi, in a QFN-40-EP(6x6). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VSSA | power_in | Analog supply voltage ground. |
| 2 | VBUS2 | power_in | Ground for the KNX transmitter. |
| 3 | TXO | output | KNX transmitter analog output (60 V rated pin, equivalent schematic Type 1). |
| 4 | CCP | passive | Analog I/O for the AC coupling external capacitor connection (60 V rated pin). |
| 5 | CAV | passive | Analog I/O for the capacitor connection to the average bus DC voltage (7 V rated pin). |
| 6 | VBUS1 | power_in | KNX power supply input (60 V rated pin). |
| 7 | CEQ1 | passive | Capacitor connection 1 for defining the equalization pulse (60 V rated pin). |
| 8 | CEQ2 | passive | Capacitor connection 2 for defining the equalization pulse (60 V rated pin). |
| 9 | VFILT | passive | Filtered bus voltage supply pin (60 V rated pin). |
| 10 | V20V | power_out | 20 V supply output from the 20 V LDO (60 V rated pin). |
| 11 | VDD2MV | input | Voltage monitor input of Voltage Regulator 2 (7 V rated pin). |
| 12 | VDD2MC | input | Current monitor input 1 of Voltage Regulator 2 (7 V rated pin). |
| 13 | VDD2 | input | Current monitor input 2 of Voltage Regulator 2 (60 V rated pin). |
| 14 | VSS2 | power_in | Voltage Regulator 2 ground. |
| 15 | VSW2 | output | Switch output of Voltage Regulator 2. |
| 16 | VIN | power_in | Power supply input for Voltage Regulators 1 and 2 (60 V rated pin). |
| 17 | VSW1 | output | Switch output of Voltage Regulator 1. |
| 18 | VSS1 | power_in | Voltage Regulator 1 ground. |
| 19 | VDD1 | input | Current input 2 and voltage monitor input of Voltage Regulator 1 (7 V rated pin). |
| 20 | VDD1M | input | Current monitor input 1 of Voltage Regulator 1 (7 V rated pin). |
| 21 | XCLKC | input | Digital input for clock frequency configuration. |
| 22 | TRIG | output | Digital transmission trigger output. |
| 23 | MODE1 | input | Digital mode selection input 1. |
| 24 | MODE2 | input | Digital mode selection input 2. |
| 25 | TREQ | input | Digital transmit request input. |
| 26 | CSB/UC1 | bidirectional | Chip select output (SPI), configuration input (UART) or 20 V LDO disable (analog mode), depending on MODE1/MODE2. |
| 27 | SDI/RXD | input | Serial data input (SPI) or receive input (UART). |
| 28 | SDO/TXD | output | Serial data output (SPI) or transmit output (UART). |
| 29 | SCK/UC2 | bidirectional | Serial clock output (SPI), configuration input (UART) or Voltage Regulator 2 disable (analog mode), depending on MODE1/MODE2. |
| 30 | VDDD | power_in | Digital supply voltage input (7 V rated pin). |
| 31 | VSSD | power_in | Digital supply voltage ground. |
| 32 | XCLK | output | Digital oscillator clock output. |
| 33 | XSEL | input | Clock selection input (quartz or digital clock). |
| 34 | XTAL2 | bidirectional | Clock generator output (quartz) or input (digital clock), selected by XSEL. |
| 35 | XTAL1 | input | Clock generator input (quartz). |
| 36 | SAVEB | output | Save signal, open drain with pull-up. |
| 37 | RESETB | output | Reset signal, open drain with pull-up. |
| 38 | FANIN | input | Fan-In digital input. |
| 39 | ANAOUT | output | Analog signal output. |
| 40 | VDDA | power_in | Analog supply voltage input (7 V rated pin). |
| 41 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | onsemi |
| Package | QFN-40-EP(6x6) |
| Category | Interface |
| Pins | 41 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| VTXO KNX Transmitter Output Voltage | VTXO | -0.3 | 45 | V | 5 | ||
| KNX Transmitter Output Current | ITXO | 250 | mA | 5 | |||
| Voltage on CCP-pin | VCCP | -10.5 | 14.5 | V | 5 | ||
| Voltage on CAV-pin | VCAV | -0.3 | 3.6 | V | 5 | ||
| Voltage on VBUS1-pin | VBUS1 | -0.3 | 45 | V | 5 | ||
| Voltage on ANAOUT pin | VANAOUT | -0.3 | 3.6 | V | 5 | ||
| Current Consumption VBUS1-pin | IBUS1 | 0 | 120 | mA | 5 | ||
| Voltage on pins CEQ1 and CEQ2 | VCEQ | -0.3 | 45 | V | 5 | ||
| Voltage on VFILT-pin | VFILT | -0.3 | 45 | V | 5 | ||
| Voltage on V20V-pin | V20V | -0.3 | 25 | V | 5 | ||
| Voltage on VDD2MV-pin | VDD2MV | -0.3 | 3.6 | V | 5 | ||
| Voltage on VDD2MC-pin | VDD2MC | -0.3 | 45 | V | 5 | ||
| Voltage on VDD2-pin | VDD2 | -0.3 | 45 | V | 5 | ||
| Voltage on VSW1- and VSW2-pin | VSW | -0.3 | 45 | V | 5 | ||
| Voltage on VIN-pin | VIN | -0.3 | 45 | V | 5 | ||
| Voltage on VDD1-pin | VDD1 | -0.3 | 3.6 | V | 5 | ||
| Voltage on VDD1M-pin | VDD1M | -0.3 | 3.6 | V | 5 | ||
| Voltage on pins MODE1, MODE2, TREQ, CSB/UC1, SDI/TXD, SDO/RXD, SCK/UC2, XCLK, XSEL, SAVEB, RESETB, XCLKC, TRIG, and FANIN | VDIG | -0.3 | 3.6 | V | 5 | ||
| Voltage on VDDD- and VDDA-pin | VDD | -0.3 | 3.6 | V | 5 | ||
| Voltage on XTAL1- and XTAL2-pin | VXTAL | -0.3 | 3.6 | V | 5 | ||
| Storage temperature | TST | -55 | 150 | °C | 5 | ||
| Junction Temperature | TJ | -40 | 155 | °C | 5 | ||
| Human Body Model electronic discharge immunity | VHBM | -2 | 2 | kV | 5 | ||
| VBUS1 Voltage | VBUS1 | 20 | 33 | V | 6 | ||
| Digital and Analog Supply Voltage (VDDD- and VDDA-pin) | VDD | 3.13 | 3.47 | V | 6 | ||
| Input Voltage DC-DC Converter 1 and 2 | VIN | 33 | V | 6 | |||
| Input Voltage at CCP-pin | VCCP | -10.5 | 14.5 | V | 6 | ||
| Input Voltage at CAV-pin | VCAV | 0 | 3.3 | V | 6 | ||
| Input Voltage on VDD1-pin | VDD1 | 3.13 | 3.47 | V | 6 | ||
| Input Voltage on VDD1M-pin | VDD1M | 3.13 | 3.57 | V | 6 | ||
| Input Voltage on VDD2-pin | VDD2 | 1.2 | 21 | V | 6 | ||
| Input Voltage on VDD2MC-pin | VDD2MC | 1.2 | 21.1 | V | 6 | ||
| Input Voltage on VDD2MV-pin | VDD2MV | 1.2 | V | 6 | |||
| Input Voltage on pins MODE1, MODE2, TREQ, CSB/UC1, SDI/RXD, SCK/UC2, XCLKC, and XSEL | VDIG | 0 | V | 6 | |||
| Input Voltage on FANIN-pin | VFANIN | 0 | 3.6 | V | 6 | ||
| Ambient Temperature | TA | -40 | 105 | °C | 6 | ||
| Junction Temperature (Note 8) | TJ | -40 | 125 | °C | 6 | ||
| Bus DC voltage | VBUS1 | 20 | 33 | V | Excluding active and equalization pulse | 7 | |
| Bus Current Consumption | IBUS1_Int | 2 | 2.7 | mA | VBUS = 30 V, IBUS = 10 mA, DC2, V20V disabled, no crystal or clock | 7 | |
| Bus Current Consumption | 3.2 | 4.1 | mA | VBUS = 20 V, IBUS = 20 mA | 7 | ||
| Undervoltage release level | VBUSH | 17.1 | 18 | 18.9 | V | VBUS1 rising, see Figure 4 | 7 |
| Undervoltage trigger level | VBUSL | 15.9 | 16.8 | 17.7 | V | VBUS1 falling, see Figure 4 | 7 |
| Undervoltage hysteresis | VBUS_Hyst | 0.6 | V | 7 | |||
| VDDD Digital Power Supply | VDDD | 3.13 | 3.3 | 3.47 | V | 7 | |
| VDDA Analog Power Supply | VDDA | 3.13 | 3.3 | 3.47 | V | 7 | |
| Auxiliary Supply | VAUX | 2.8 | 3.3 | 3.6 | V | Internal supply, for info only | 7 |
| VBUS1 Bus Coupler Current Slope Limitation | Icoupler/t | 0.4 | 0.5 | A/s | FANIN floating, VFILT > VFILTH | 7 | |
| VBUS1 Bus Coupler Current Slope Limitation | 0.8 | 1 | A/s | FANIN = 0, VFILT > VFILTH | 7 | ||
| VBUS1 Bus Coupler Startup Current Limitation | Icoupler_lim, startup | 20 | 25 | 30 | mA | FANIN floating, VFILT > VFILTH | 7 |
| VBUS1 Bus Coupler Startup Current Limitation | 40 | 50 | 60 | mA | FANIN = 0, VFILT > VFILTH | 7 | |
| VBUS1 Bus Coupler Current Limitation | Icoupler_lim | 10.6 | 11.4 | 12 | mA | FANIN floating, VFILT > VFILTH | 7 |
| VBUS1 Bus Coupler Current Limitation | 20.5 | 22.3 | 24 | mA | FANIN = 0, VFILT > VFILTH | 7 | |
| Coupler Voltage Drop (Vcoupler_drop = VBUS1 − VFILT) | Vcoupler_drop | 1.72 | 2.32 | V | IBUS1 = 10 mA | 7 | |
| Coupler Voltage Drop (Vcoupler_drop = VBUS1 − VFILT) | 2.34 | 2.8 | V | IBUS1 = 20 mA | 7 | ||
| VFILT Undervoltage release level | VFILTH | 10.1 | 10.6 | 11.2 | V | VFILT rising, see Figure 5 | 7 |
| VFILT Undervoltage trigger level | VFILTL | 8.4 | 8.9 | 9.4 | V | VFILT falling, see Figure 5 | 7 |
| VIN Input Voltage | VIN | 4.47 | 33 | V | 7 | ||
| VDD1 Output Voltage | VDD1 | 3.13 | 3.3 | 3.47 | V | 7 | |
| Overcurrent Threshold | IDD1_lim | -100 | -200 | mA | R2 = 1, see Figure 13 | 7 | |
| RDS(on) of power switch | RDS(on)_p1 | 9 | Ω | See Figure 18 | 7 |
CAD (KiCad official)
- Symbol:
NCN5121MNTWG - Footprint:
Package_DFN_QFN:QFN-40-1EP_6x6mm_P0.5mm_EP4.6x4.6mm - 3D model: QFN-40-EP(6x6) (KiCad packages3D, STEP)
- 3D model files:
ncn5121mntwg-etched.step/ncn5121mntwg-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ncn5121mntwg.step/ncn5121mntwg.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: onsemi datasheet (60 pp, sha256
76562040378f82b6, retrieved 2026-10-18, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# NCN5121MNTWG
**onsemi** · Interface - Specialized · QFN-40-EP(6x6)
NCN5121MNTWG from onsemi, in a QFN-40-EP(6x6). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VSSA | power_in | Analog supply voltage ground. |
| 2 | VBUS2 | power_in | Ground for the KNX transmitter. |
| 3 | TXO | output | KNX transmitter analog output (60 V rated pin, equivalent schematic Type 1). |
| 4 | CCP | passive | Analog I/O for the AC coupling external capacitor connection (60 V rated pin). |
| 5 | CAV | passive | Analog I/O for the capacitor connection to the average bus DC voltage (7 V rated pin). |
| 6 | VBUS1 | power_in | KNX power supply input (60 V rated pin). |
| 7 | CEQ1 | passive | Capacitor connection 1 for defining the equalization pulse (60 V rated pin). |
| 8 | CEQ2 | passive | Capacitor connection 2 for defining the equalization pulse (60 V rated pin). |
| 9 | VFILT | passive | Filtered bus voltage supply pin (60 V rated pin). |
| 10 | V20V | power_out | 20 V supply output from the 20 V LDO (60 V rated pin). |
| 11 | VDD2MV | input | Voltage monitor input of Voltage Regulator 2 (7 V rated pin). |
| 12 | VDD2MC | input | Current monitor input 1 of Voltage Regulator 2 (7 V rated pin). |
| 13 | VDD2 | input | Current monitor input 2 of Voltage Regulator 2 (60 V rated pin). |
| 14 | VSS2 | power_in | Voltage Regulator 2 ground. |
| 15 | VSW2 | output | Switch output of Voltage Regulator 2. |
| 16 | VIN | power_in | Power supply input for Voltage Regulators 1 and 2 (60 V rated pin). |
| 17 | VSW1 | output | Switch output of Voltage Regulator 1. |
| 18 | VSS1 | power_in | Voltage Regulator 1 ground. |
| 19 | VDD1 | input | Current input 2 and voltage monitor input of Voltage Regulator 1 (7 V rated pin). |
| 20 | VDD1M | input | Current monitor input 1 of Voltage Regulator 1 (7 V rated pin). |
| 21 | XCLKC | input | Digital input for clock frequency configuration. |
| 22 | TRIG | output | Digital transmission trigger output. |
| 23 | MODE1 | input | Digital mode selection input 1. |
| 24 | MODE2 | input | Digital mode selection input 2. |
| 25 | TREQ | input | Digital transmit request input. |
| 26 | CSB/UC1 | bidirectional | Chip select output (SPI), configuration input (UART) or 20 V LDO disable (analog mode), depending on MODE1/MODE2. |
| 27 | SDI/RXD | input | Serial data input (SPI) or receive input (UART). |
| 28 | SDO/TXD | output | Serial data output (SPI) or transmit output (UART). |
| 29 | SCK/UC2 | bidirectional | Serial clock output (SPI), configuration input (UART) or Voltage Regulator 2 disable (analog mode), depending on MODE1/MODE2. |
| 30 | VDDD | power_in | Digital supply voltage input (7 V rated pin). |
| 31 | VSSD | power_in | Digital supply voltage ground. |
| 32 | XCLK | output | Digital oscillator clock output. |
| 33 | XSEL | input | Clock selection input (quartz or digital clock). |
| 34 | XTAL2 | bidirectional | Clock generator output (quartz) or input (digital clock), selected by XSEL. |
| 35 | XTAL1 | input | Clock generator input (quartz). |
| 36 | SAVEB | output | Save signal, open drain with pull-up. |
| 37 | RESETB | output | Reset signal, open drain with pull-up. |
| 38 | FANIN | input | Fan-In digital input. |
| 39 | ANAOUT | output | Analog signal output. |
| 40 | VDDA | power_in | Analog supply voltage input (7 V rated pin). |
| 41 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | onsemi |
| Package | QFN-40-EP(6x6) |
| Category | Interface |
| Pins | 41 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| VTXO KNX Transmitter Output Voltage | VTXO | -0.3 | | 45 | V | | 5 |
| KNX Transmitter Output Current | ITXO | | | 250 | mA | | 5 |
| Voltage on CCP-pin | VCCP | -10.5 | | 14.5 | V | | 5 |
| Voltage on CAV-pin | VCAV | -0.3 | | 3.6 | V | | 5 |
| Voltage on VBUS1-pin | VBUS1 | -0.3 | | 45 | V | | 5 |
| Voltage on ANAOUT pin | VANAOUT | -0.3 | | 3.6 | V | | 5 |
| Current Consumption VBUS1-pin | IBUS1 | 0 | | 120 | mA | | 5 |
| Voltage on pins CEQ1 and CEQ2 | VCEQ | -0.3 | | 45 | V | | 5 |
| Voltage on VFILT-pin | VFILT | -0.3 | | 45 | V | | 5 |
| Voltage on V20V-pin | V20V | -0.3 | | 25 | V | | 5 |
| Voltage on VDD2MV-pin | VDD2MV | -0.3 | | 3.6 | V | | 5 |
| Voltage on VDD2MC-pin | VDD2MC | -0.3 | | 45 | V | | 5 |
| Voltage on VDD2-pin | VDD2 | -0.3 | | 45 | V | | 5 |
| Voltage on VSW1- and VSW2-pin | VSW | -0.3 | | 45 | V | | 5 |
| Voltage on VIN-pin | VIN | -0.3 | | 45 | V | | 5 |
| Voltage on VDD1-pin | VDD1 | -0.3 | | 3.6 | V | | 5 |
| Voltage on VDD1M-pin | VDD1M | -0.3 | | 3.6 | V | | 5 |
| Voltage on pins MODE1, MODE2, TREQ, CSB/UC1, SDI/TXD, SDO/RXD, SCK/UC2, XCLK, XSEL, SAVEB, RESETB, XCLKC, TRIG, and FANIN | VDIG | -0.3 | | 3.6 | V | | 5 |
| Voltage on VDDD- and VDDA-pin | VDD | -0.3 | | 3.6 | V | | 5 |
| Voltage on XTAL1- and XTAL2-pin | VXTAL | -0.3 | | 3.6 | V | | 5 |
| Storage temperature | TST | -55 | | 150 | °C | | 5 |
| Junction Temperature | TJ | -40 | | 155 | °C | | 5 |
| Human Body Model electronic discharge immunity | VHBM | -2 | | 2 | kV | | 5 |
| VBUS1 Voltage | VBUS1 | 20 | | 33 | V | | 6 |
| Digital and Analog Supply Voltage (VDDD- and VDDA-pin) | VDD | 3.13 | | 3.47 | V | | 6 |
| Input Voltage DC-DC Converter 1 and 2 | VIN | | | 33 | V | | 6 |
| Input Voltage at CCP-pin | VCCP | -10.5 | | 14.5 | V | | 6 |
| Input Voltage at CAV-pin | VCAV | 0 | | 3.3 | V | | 6 |
| Input Voltage on VDD1-pin | VDD1 | 3.13 | | 3.47 | V | | 6 |
| Input Voltage on VDD1M-pin | VDD1M | 3.13 | | 3.57 | V | | 6 |
| Input Voltage on VDD2-pin | VDD2 | 1.2 | | 21 | V | | 6 |
| Input Voltage on VDD2MC-pin | VDD2MC | 1.2 | | 21.1 | V | | 6 |
| Input Voltage on VDD2MV-pin | VDD2MV | 1.2 | | | V | | 6 |
| Input Voltage on pins MODE1, MODE2, TREQ, CSB/UC1, SDI/RXD, SCK/UC2, XCLKC, and XSEL | VDIG | 0 | | | V | | 6 |
| Input Voltage on FANIN-pin | VFANIN | 0 | | 3.6 | V | | 6 |
| Ambient Temperature | TA | -40 | | 105 | °C | | 6 |
| Junction Temperature (Note 8) | TJ | -40 | | 125 | °C | | 6 |
| Bus DC voltage | VBUS1 | 20 | | 33 | V | Excluding active and equalization pulse | 7 |
| Bus Current Consumption | IBUS1_Int | | 2 | 2.7 | mA | VBUS = 30 V, IBUS = 10 mA, DC2, V20V disabled, no crystal or clock | 7 |
| Bus Current Consumption | | | 3.2 | 4.1 | mA | VBUS = 20 V, IBUS = 20 mA | 7 |
| Undervoltage release level | VBUSH | 17.1 | 18 | 18.9 | V | VBUS1 rising, see Figure 4 | 7 |
| Undervoltage trigger level | VBUSL | 15.9 | 16.8 | 17.7 | V | VBUS1 falling, see Figure 4 | 7 |
| Undervoltage hysteresis | VBUS_Hyst | 0.6 | | | V | | 7 |
| VDDD Digital Power Supply | VDDD | 3.13 | 3.3 | 3.47 | V | | 7 |
| VDDA Analog Power Supply | VDDA | 3.13 | 3.3 | 3.47 | V | | 7 |
| Auxiliary Supply | VAUX | 2.8 | 3.3 | 3.6 | V | Internal supply, for info only | 7 |
| VBUS1 Bus Coupler Current Slope Limitation | Icoupler/t | | 0.4 | 0.5 | A/s | FANIN floating, VFILT > VFILTH | 7 |
| VBUS1 Bus Coupler Current Slope Limitation | | | 0.8 | 1 | A/s | FANIN = 0, VFILT > VFILTH | 7 |
| VBUS1 Bus Coupler Startup Current Limitation | Icoupler_lim, startup | 20 | 25 | 30 | mA | FANIN floating, VFILT > VFILTH | 7 |
| VBUS1 Bus Coupler Startup Current Limitation | | 40 | 50 | 60 | mA | FANIN = 0, VFILT > VFILTH | 7 |
| VBUS1 Bus Coupler Current Limitation | Icoupler_lim | 10.6 | 11.4 | 12 | mA | FANIN floating, VFILT > VFILTH | 7 |
| VBUS1 Bus Coupler Current Limitation | | 20.5 | 22.3 | 24 | mA | FANIN = 0, VFILT > VFILTH | 7 |
| Coupler Voltage Drop (Vcoupler_drop = VBUS1 − VFILT) | Vcoupler_drop | | 1.72 | 2.32 | V | IBUS1 = 10 mA | 7 |
| Coupler Voltage Drop (Vcoupler_drop = VBUS1 − VFILT) | | | 2.34 | 2.8 | V | IBUS1 = 20 mA | 7 |
| VFILT Undervoltage release level | VFILTH | 10.1 | 10.6 | 11.2 | V | VFILT rising, see Figure 5 | 7 |
| VFILT Undervoltage trigger level | VFILTL | 8.4 | 8.9 | 9.4 | V | VFILT falling, see Figure 5 | 7 |
| VIN Input Voltage | VIN | 4.47 | | 33 | V | | 7 |
| VDD1 Output Voltage | VDD1 | 3.13 | 3.3 | 3.47 | V | | 7 |
| Overcurrent Threshold | IDD1_lim | -100 | | -200 | mA | R2 = 1, see Figure 13 | 7 |
| RDS(on) of power switch | RDS(on)_p1 | | | 9 | Ω | See Figure 18 | 7 |
## CAD (KiCad official)
- Symbol: `NCN5121MNTWG`
- Footprint: `Package_DFN_QFN:QFN-40-1EP_6x6mm_P0.5mm_EP4.6x4.6mm`
- 3D model: QFN-40-EP(6x6) (KiCad packages3D, STEP)
- 3D model files: `ncn5121mntwg-etched.step` / `ncn5121mntwg-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `ncn5121mntwg.step` / `ncn5121mntwg.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [onsemi datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588893088433778688) (60 pp, sha256 `76562040378f82b6`, retrieved 2026-10-18, tier: lcsc)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/ncn5121mntwg-datasheet.pdf)