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NCN4555MNR2G

onsemi · Translators / Level Shifters · QFN-16-EP(3x3)

NCN4555MNR2G from onsemi, in a QFN-16-EP(3x3). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 STOP input Power-down mode pin: a Low level activates the low-current shutdown mode and resets the SIM interface by switching off SIM_VCC, while High gives normal operation.
2 MOD_VCC input Selects the SIM_VCC output voltage: Low programs 1.8 V and High programs 3 V.
3 VDD power_in Microcontroller-side supply that sets the level shifter input stage; a 0.1 µF bypass capacitor is required, and SIM_VCC is disabled with the device in shutdown when VDD is below 1.1 V typical.
4 NC unconnected No connect.
5 VBAT power_in DC-DC converter supply input with a range of 2.7 V to 5.5 V, which must be bypassed by a 0.1 µF capacitor.
6 NC unconnected No connect.
7 SIM_VCC power_out Card supply output from the internal LDO, programmable to 1.8 V or 3.0 V, requiring a 1.0 µF minimum ceramic capacitor to ground.
8 SIM_I/O bidirectional Serial I/O connection to the card connector with a bidirectional level translator and a 14 kΩ typical pullup providing a high-impedance state for the card I/O link.
9 SIM_RST output Level-translated reset output connected to the RESET pin of the card connector.
10 GND power_in Ground reference for the integrated circuit and associated signals; care must be taken to avoid voltage spikes during normal operation.
11 SIM_CLK output Level-translated clock output to the CLOCK pin of the card connector, with its level set by SIM_VCC.
12 NC unconnected No connect.
13 CLK input Clock input from the external controller, which should have a duty cycle within the specified min/max limits (typically 50%).
14 RST input Reset input that is level-shifted to the SIM card according to the programmed SIM_VCC value.
15 I/O bidirectional Serial I/O connection to the external microcontroller with a bidirectional level translator and a built-in constant 18 kΩ typical resistor that provides a high-impedance state when not activated.
16 NC unconnected No connect.
17 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer onsemi
Package QFN-16-EP(3x3)
Category Logic ICs
Pins 17

CAD (KiCad official)

  • Symbol: NCN4555MNR2G
  • Footprint: Package_DFN_QFN:QFN-16-1EP_3x3mm_P0.5mm_EP1.7x1.7mm
  • 3D model: QFN-16-EP(3x3) (KiCad packages3D, STEP)
  • 3D model files: ncn4555mnr2g-etched.step / ncn4555mnr2g-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ncn4555mnr2g.step / ncn4555mnr2g.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: onsemi datasheet (12 pp, sha256 d7485c3e29c4e88d, retrieved 2026-10-27, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF