component
NCD57001DWR2G
Public Made by Adomby adom
onsemi Isolators - Gate Drivers, SOIC-16-300mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
← Commit history
ncd57001dwr2g: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding)
2 files changed
+92−12
package.json+50−10@@ -59,7 +59,7 @@ "number": "2", "name": "DESAT", "type": "bidirectional",- "description": "Desaturation detection input with internal constant current source (0.45-0.6 mA) for programmable blanking delay; voltage range \u22129 to VDD2 + 0.3 V."+ "description": "Desaturation detection input with internal constant current source (0.45-0.6 mA) for programmable blanking delay; voltage range −9 to VDD2 + 0.3 V." }, { "number": "3",@@ -89,13 +89,13 @@ "number": "7", "name": "CLAMP", "type": "bidirectional",- "description": "Gate clamping input/output pin connected directly to IGBT/FET gate for parasitic turn-on protection; internal N-FET turns on when voltage falls below VEE2 + VCLAMP\u2212THR (1.5 to 2.5 V)."+ "description": "Gate clamping input/output pin connected directly to IGBT/FET gate for parasitic turn-on protection; internal N-FET turns on when voltage falls below VEE2 + VCLAMP−THR (1.5 to 2.5 V)." }, { "number": "8", "name": "VEE2", "type": "power_in",- "description": "Output side negative power supply with range \u221210 to 0 V; requires good quality bypassing capacitor to GND2 placed close to pin for best results."+ "description": "Output side negative power supply with range −10 to 0 V; requires good quality bypassing capacitor to GND2 placed close to pin for best results." }, { "number": "9",@@ -107,19 +107,19 @@ "number": "10", "name": "IN+", "type": "input",- "description": "Non-inverted gate driver input internally clamped to VDD1 with 50 k\u03a9 pull-down resistor; requires minimum 40 ns pulse width for guaranteed output response."+ "description": "Non-inverted gate driver input internally clamped to VDD1 with 50 kΩ pull-down resistor; requires minimum 40 ns pulse width for guaranteed output response." }, { "number": "11",- "name": "IN\u2212",+ "name": "IN−", "type": "input",- "description": "Inverted gate driver input internally clamped to VDD1 with 50 k\u03a9 pull-up resistor; requires minimum 40 ns pulse width for guaranteed output response."+ "description": "Inverted gate driver input internally clamped to VDD1 with 50 kΩ pull-up resistor; requires minimum 40 ns pulse width for guaranteed output response." }, { "number": "12", "name": "RDY", "type": "output",- "description": "Power good indication output active high when VDD2 exceeds UVLO2 threshold (13.2-13.8 V); open-drain with 50 k\u03a9 pull-up resistor and maximum 200 ns low duration on UVLO2 event."+ "description": "Power good indication output active high when VDD2 exceeds UVLO2 threshold (13.2-13.8 V); open-drain with 50 kΩ pull-up resistor and maximum 200 ns low duration on UVLO2 event." }, { "number": "13",@@ -131,7 +131,7 @@ "number": "14", "name": "/RST", "type": "input",- "description": "Active-low reset input with 50 k\u03a9 pull-up resistor; requires minimum 800 ns pulse width to reset fault latch."+ "description": "Active-low reset input with 50 kΩ pull-up resistor; requires minimum 800 ns pulse width to reset fault latch." }, { "number": "15",@@ -180,6 +180,46 @@ "viewers": { "symbol": "viewers/symbol.html", "footprint": "viewers/footprint.html"- }+ },+ "models_3d": [+ {+ "file": "ncd57001dwr2g.step",+ "role": "plain",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 6.0,+ 9.9,+ 1.75+ ],+ "zmin_mm": -0.0,+ "centre_offset_mm": 0.0,+ "footprint_binding": "identity",+ "sha256": "d5eeddb4c0b304dc61950919b126fc61d7586abd5f16ab71a2a79759ec6498bf",+ "checked": "2026-10-07",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ },+ {+ "file": "ncd57001dwr2g-etched.step",+ "role": "eda",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 6.0,+ 9.9,+ 1.75+ ],+ "zmin_mm": -0.0,+ "centre_offset_mm": 0.0,+ "footprint_binding": "identity",+ "sha256": "320f3f66d29bdde2678256935fee6d74189c2d06c3b7bdc6af89c6820a6c9e0e",+ "checked": "2026-10-07",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ }+ ] }-}+}
page.json+42−2@@ -165,7 +165,47 @@ "viewers": { "symbol": "viewers/symbol.html", "footprint": "viewers/footprint.html"- }+ },+ "models_3d": [+ {+ "file": "ncd57001dwr2g.step",+ "role": "plain",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 6.0,+ 9.9,+ 1.75+ ],+ "zmin_mm": -0.0,+ "centre_offset_mm": 0.0,+ "footprint_binding": "identity",+ "sha256": "d5eeddb4c0b304dc61950919b126fc61d7586abd5f16ab71a2a79759ec6498bf",+ "checked": "2026-10-07",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ },+ {+ "file": "ncd57001dwr2g-etched.step",+ "role": "eda",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 6.0,+ 9.9,+ 1.75+ ],+ "zmin_mm": -0.0,+ "centre_offset_mm": 0.0,+ "footprint_binding": "identity",+ "sha256": "320f3f66d29bdde2678256935fee6d74189c2d06c3b7bdc6af89c6820a6c9e0e",+ "checked": "2026-10-07",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ }+ ] }, "metadata": { "specs": {@@ -213,4 +253,4 @@ "public": true }, "updated_at": "2026-09-25T02:50:40.820Z"-}+}