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Contents

README

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NCD57001DWR2G

onsemi · Isolators - Gate Drivers · SOIC-16-300mil

NCD57001DWR2G from onsemi, in a SOIC-16-300mil. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VEE2A power_in Output side negative power supply; requires good quality bypassing capacitor to GND2 placed close to pin for best results.
2 DESAT bidirectional Desaturation detection input with internal constant current source (0.45-0.6 mA) for programmable blanking delay; voltage range −9 to VDD2 + 0.3 V.
3 GND2 power_in Output side gate drive reference connecting to IGBT emitter or FET source.
4 N/C unconnected Not connected.
5 VDD2 power_in Output side positive power supply with operating range from UVLO2 (13.2 to 13.8 V typical) to 24 V maximum; requires bypassing capacitor to GND2.
6 OUT output Gate driver output providing up to 4 A source and 6 A sink current to IGBT/FET gate; actively pulled low during start-up and fault conditions.
7 CLAMP bidirectional Gate clamping input/output pin connected directly to IGBT/FET gate for parasitic turn-on protection; internal N-FET turns on when voltage falls below VEE2 + VCLAMP−THR (1.5 to 2.5 V).
8 VEE2 power_in Output side negative power supply with range −10 to 0 V; requires good quality bypassing capacitor to GND2 placed close to pin for best results.
9 GND1 power_in Input side ground reference.
10 IN+ input Non-inverted gate driver input internally clamped to VDD1 with 50 kΩ pull-down resistor; requires minimum 40 ns pulse width for guaranteed output response.
11 IN− input Inverted gate driver input internally clamped to VDD1 with 50 kΩ pull-up resistor; requires minimum 40 ns pulse width for guaranteed output response.
12 RDY output Power good indication output active high when VDD2 exceeds UVLO2 threshold (13.2-13.8 V); open-drain with 50 kΩ pull-up resistor and maximum 200 ns low duration on UVLO2 event.
13 /FLT output Active-low fault output indicating desaturation condition and driver shutdown; open-drain output that allows multiple drivers to be OR'ed together.
14 /RST input Active-low reset input with 50 kΩ pull-up resistor; requires minimum 800 ns pulse width to reset fault latch.
15 VDD1 power_in Input side power supply with operating range from UVLO1 (2.4 V disable, 3.0 V typical enable) to 5.5 V maximum; supports both 3.3 V and 5 V logic levels.
16 GND1A power_in Input side ground reference for improved current distribution.

Key specifications

Parameter Value
Manufacturer onsemi
Package SOIC-16-300mil
Category Power Management (PMIC)
Pins 16

CAD (KiCad official)

  • Symbol: NCD57001DWR2G
  • Footprint: Package_SO:SOIC-16_3.9x9.9mm_P1.27mm
  • 3D model: SOIC-16-300mil (KiCad packages3D, STEP)
  • 3D model files: ncd57001dwr2g-etched.step / ncd57001dwr2g-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ncd57001dwr2g.step / ncd57001dwr2g.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: onsemi datasheet (13 pp, sha256 f2926c50e61b5cb9, retrieved 2026-09-21, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-4-6 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF