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Generated by kicad-footprint-generator · KiCad file format 20260206
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docs nc7sz32p5x: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
viewers pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
nc7sz32p5x-etched.fit.json nc7sz32p5x: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
nc7sz32p5x-etched.glb nc7sz32p5x: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
nc7sz32p5x-etched.step nc7sz32p5x: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
nc7sz32p5x.glb Publish 0.1.0 · Ray
nc7sz32p5x.kicad_mod Publish 0.1.0 · Ray
nc7sz32p5x.kicad_sym Publish 0.1.0 · Ray
nc7sz32p5x.lbr rebuild the library on adom-lbr 2.32.0. The published copy was built by 2.18.0, which imported every KiCad roundrect an… · Ray
nc7sz32p5x.step Publish 0.1.0 · Ray
package.json Publish 0.2.0 · Ray
pads.json pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
page.json nc7sz32p5x: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) · Ray
README.md nc7sz32p5x: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray

NC7SZ32P5X

onsemi · Gates · SC-70-5

NC7SZ32P5X from onsemi, in a SC-70-5. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 A input Logic input A. CMOS-level input, 5.5 V tolerant regardless of VCC. VIH = 0.65·VCC min (VCC 1.65-1.95 V) or 0.70·VCC min (VCC 2.30-5.50 V); VIL = 0.35·VCC max or 0.30·VCC max respectively. Input leakage ±1 µA typ.
2 B input Logic input B. CMOS-level input, 5.5 V tolerant regardless of VCC. Same VIH/VIL thresholds as input A. Unused inputs must be tied HIGH or LOW; they may not float.
3 GND power_in Ground / 0 V reference for the device.
4 Y output Push-pull OR-gate output, Y = A + B. High output drive: ±24 mA at 3 V VCC (up to ±32 mA at 4.5 V VCC). Output is high-impedance when VCC = 0 V (power-down input/output tolerance).
5 VCC power_in Positive supply voltage. Recommended operating range 1.65 V to 5.50 V (1.50 V min for data retention). Absolute maximum 6.5 V. Quiescent supply current ICC = 2 µA typ / 20 µA max. Bypass with a 0.1 µF ceramic capacitor close to the pin.

Key specifications

Parameter Value
Manufacturer onsemi
Package SC-70-5
Category Logic
Pins 5

Ordering variants

Same part, different packaging or reel option.

  • NC7SZ32P5X
  • NC7SZ32P5X-F22057
  • NC7SZ32P5XM5X
  • NC7SZ32P5XM5X-L22090 (SOT23-5)
  • NC7SZ32P5XM5X-L22090
  • NC7SZ32P5XL6X
  • NC7SZ32P5XL6X-L22175
  • NC7SZ32P5XFHX
  • NC7SZ32P5XFHX-L22175

CAD (KiCad official)

  • Symbol: NC7SZ32P5X
  • Footprint: Package_TO_SOT_SMD:SOT-353_SC-70-5
  • 3D model: SC-70-5 (KiCad packages3D, STEP)
  • 3D model files: nc7sz32p5x-etched.step / nc7sz32p5x-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); nc7sz32p5x.step / nc7sz32p5x.glb are the bare package body.

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
nc7sz32p5x.step 87 KB You want the bare part, or you mark your own boards.
nc7sz32p5x-etched.step 1.9 MB You want the part with NC7SZ32P5X already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 469 faces against 102 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: onsemi datasheet (12 pp, sha256 f7f091eac6b62e97, retrieved 2026-08-17, tier: manufacturer)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF