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NC7SZ00P5X

TECH PUBLIC · Logic Gates · SC-70-5

NC7SZ00P5X from TECH PUBLIC, in a SC-70-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 A input Gate input A; inputs accept voltages up to 5.5 V (recommended VIH min 2 V at VCC 3 V to 3.6 V, VIL max 0.8 V).
2 B input Gate input B; inputs accept voltages up to 5.5 V (recommended VIH min 2 V at VCC 3 V to 3.6 V, VIL max 0.8 V).
3 GND power_in Ground reference for the device.
4 Y output NAND gate output Y = NOT(A AND B), with ±24 mA output drive at 3.3 V.
5 VCC power_in Positive supply, recommended 1.65 V to 5.5 V (absolute maximum 6.5 V).

Key specifications

Parameter Value
Manufacturer TECH PUBLIC
Package SC-70-5
Category Logic
Pins 5

CAD (KiCad official)

  • Symbol: NC7SZ00P5X
  • Footprint: Package_TO_SOT_SMD:SOT-353_SC-70-5
  • 3D model: SC-70-5 (KiCad packages3D, STEP)
  • 3D model files: nc7sz00p5x-etched.step / nc7sz00p5x-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); nc7sz00p5x.step / nc7sz00p5x.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: TECH PUBLIC datasheet (10 pp, sha256 8a1bb2219887553c, retrieved 2026-10-09, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF