# NC7SP00P5X

**onsemi** · Logic Gates · SC-70-5

NC7SP00P5X from onsemi, in a SC-70-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | A | input | Gate input A; unused inputs must be held HIGH or LOW and may not float, with input voltage 0V to 3.6V. |
| 2 | B | input | Gate input B; unused inputs must be held HIGH or LOW and may not float, with input voltage 0V to 3.6V. |
| 3 | GND | power_in | Ground reference pin for the device. |
| 4 | Y | output | NAND output Y = NOT(A·B), with static drive of ±2.6 mA at 3.00V VCC and 3.6V overvoltage tolerance. |
| 5 | VCC | power_in | Positive supply pin, operating range 0.9V to 3.6V. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | onsemi |
| Package | SC-70-5 |
| Category | Logic |
| Pins | 5 |

## CAD (KiCad official)

- Symbol: `NC7SP00P5X`
- Footprint: `Package_TO_SOT_SMD:SOT-353_SC-70-5`
- 3D model: SC-70-5 (KiCad packages3D, STEP)
- 3D model files: `nc7sp00p5x-etched.step` / `nc7sp00p5x-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `nc7sp00p5x.step` / `nc7sp00p5x.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [onsemi datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8589988994965938176) (11 pp, sha256 `44aab5d1bc5b3a3d`, retrieved 2026-10-09, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text+vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/nc7sp00p5x-datasheet.pdf)