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NC7S00M5X

TECH PUBLIC · Logic Gates · SOT-23-5

NC7S00M5X from TECH PUBLIC, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 INB input Gate input B of the 2-input NAND gate; input voltage range 0 to VCC, absolute max -0.5 to VCC+0.5 V.
2 INA input Gate input A of the 2-input NAND gate; input voltage range 0 to VCC, absolute max -0.5 to VCC+0.5 V.
3 GND power_in Ground reference for the device.
4 OUTX output NAND gate output, low only when both INA and INB are high; output current ±25 mA absolute max, IOH/IOL 2 mA min.
5 VCC power_in Positive supply; operating range 2.0 to 6.0 V, absolute max 7.0 V.

Key specifications

Parameter Value
Manufacturer TECH PUBLIC
Package SOT-23-5
Category Logic
Pins 5

CAD (KiCad official)

  • Symbol: NC7S00M5X
  • Footprint: Package_TO_SOT_SMD:SOT-23-5
  • 3D model: SOT-23-5 (KiCad packages3D, STEP)
  • 3D model files: nc7s00m5x-etched.step / nc7s00m5x-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); nc7s00m5x.step / nc7s00m5x.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: TECH PUBLIC datasheet (5 pp, sha256 86dc251fc88a6969, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF