component
NAU7802SGI
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Nuvoton Tech Analog To Digital Converters (ADC), SOP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+52@@ -0,0 +1,52 @@+# NAU7802SGI++**Nuvoton Tech** · Analog To Digital Converters (ADC) · SOP-16++NAU7802SGI from Nuvoton Tech, in a SOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | REFP | input | Positive reference input accepting VREFN+1.5V to AVDD+0.1V (absolute max −0.3V to AVDD+0.3V). |+| 2 | VIN1N | input | Inverting input for channel 1, common-mode AVSS+1.5V to AVDD−1.5V (PGA gains 64−128) or AVSS−0.1V to AVDD+0.1V (PGA bypass mode). |+| 3 | VIN1P | input | Non-inverting input for channel 1, common-mode AVSS+1.5V to AVDD−1.5V (PGA gains 64−128) or AVSS−0.1V to AVDD+0.1V (PGA bypass mode). |+| 4 | VIN2N | input | Inverting input for channel 2, common-mode AVSS+1.5V to AVDD−1.5V (PGA gains 64−128) or AVSS−0.1V to AVDD+0.1V (PGA bypass mode). |+| 5 | VIN2P | input | Non-inverting input for channel 2, common-mode AVSS+1.5V to AVDD−1.5V (PGA gains 64−128) or AVSS−0.1V to AVDD+0.1V (PGA bypass mode). |+| 6 | VBG | output | Bandgap reference voltage output, 109mV at 25°C with 360µV/°C temperature coefficient; bypass with 0.1µF capacitor to AVSS. |+| 7 | REFN | input | Negative reference input accepting −0.1V to REFP−1.5V (absolute max −0.3V to AVDD+0.3V). |+| 8 | AVSS | power_in | Analog ground, 0V reference for all analog circuits. |+| 9 | DVSS | power_in | Digital ground, 0V reference for all digital circuits. |+| 10 | XIN | input | External crystal oscillator input, 4.9152MHz ±3% or external clock input (absolute max −0.3V to DVDD+0.3V). |+| 11 | XOUT | output | External crystal oscillator output (absolute max −0.3V to DVDD+0.3V). |+| 12 | DRDY | output | Data Ready output (CMOS driver), VOH=0.9×DVDD and VOL=0.2×DVDD, pulled high when new conversion data available; polarity configurable via REG0x01[7]. |+| 13 | SCLK | input | Serial clock input for I2C interface, 0−100kHz standard mode or 0−400kHz fast mode (VIH≥0.7×VDD, VIL≤0.3×VDD). |+| 14 | SDIO | bidirectional | Serial data input/output for I2C interface, 0−100kHz standard or 0−400kHz fast mode, open-drain output from NAU7802 (VIH≥0.7×VDD, VIL≤0.3×VDD). |+| 15 | DVDD | power_in | Digital power supply, 2.7V to 5.5V; must be 0.3V above AVDD when using internal LDO (absolute max −0.3V to +6.0V). |+| 16 | AVDD/LDO | power_in | Analog power supply from internal LDO (2.4−4.5V selectable, requires ≤1Ω ESR capacitor) or external 2.7−5.5V when LDO disabled (absolute max −0.3V to +6.0V). |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Nuvoton Tech |+| Package | SOP-16 |+| Category | Data Acquisition |+| Pins | 16 |++## CAD (KiCad official)++- Symbol: `NAU7802SGI`+- Footprint: `Package_SO:SOIC-16_3.9x9.9mm_P1.27mm`+- 3D model: SOP-16 (KiCad packages3D, STEP)+- 3D model files: `nau7802sgi-etched.step` / `nau7802sgi-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `nau7802sgi.step` / `nau7802sgi.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Nuvoton Tech datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588929815370215424) (42 pp, sha256 `da3e8fd3c0d10a75`, retrieved 2026-09-22, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.2`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-4-6` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/nau7802sgi-datasheet.pdf)
page.jsonadded+189@@ -0,0 +1,189 @@+{+ "slug": "nau7802sgi",+ "version": "0.1.0",+ "type": "component",+ "description": "Nuvoton Tech Analog To Digital Converters (ADC), SOP-16. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "data acquisition",+ "nau7802sgi",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "nau7802sgi.kicad_sym",+ "nau7802sgi.kicad_mod",+ "nau7802sgi.glb",+ "nau7802sgi.step",+ "nau7802sgi.lbr",+ "docs/hero.png",+ "docs/nau7802sgi-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html"+ ],+ "component": {+ "mpn": "NAU7802SGI",+ "manufacturer": "Nuvoton Tech",+ "package": "SOP-16",+ "pin_count": 16,+ "category": "Data Acquisition",+ "subcategory": "Analog To Digital Converters (ADC)",+ "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588929815370215424",+ "parts": {+ "symbol": "nau7802sgi.kicad_sym",+ "footprint": "nau7802sgi.kicad_mod",+ "model_3d": "nau7802sgi-etched.glb",+ "model_3d_plain": "nau7802sgi.glb",+ "model_3d_step": "nau7802sgi-etched.step",+ "model_3d_step_plain": "nau7802sgi.step",+ "lbr": "nau7802sgi.lbr"+ },+ "distributor_links": {+ "lcsc": "C2614351"+ },+ "pins": [+ {+ "number": "1",+ "name": "REFP",+ "type": "input",+ "description": "Positive reference input accepting VREFN+1.5V to AVDD+0.1V (absolute max −0.3V to AVDD+0.3V)."+ },+ {+ "number": "2",+ "name": "VIN1N",+ "type": "input",+ "description": "Inverting input for channel 1, common-mode AVSS+1.5V to AVDD−1.5V (PGA gains 64−128) or AVSS−0.1V to AVDD+0.1V (PGA bypass mode)."+ },+ {+ "number": "3",+ "name": "VIN1P",+ "type": "input",+ "description": "Non-inverting input for channel 1, common-mode AVSS+1.5V to AVDD−1.5V (PGA gains 64−128) or AVSS−0.1V to AVDD+0.1V (PGA bypass mode)."+ },+ {+ "number": "4",+ "name": "VIN2N",+ "type": "input",+ "description": "Inverting input for channel 2, common-mode AVSS+1.5V to AVDD−1.5V (PGA gains 64−128) or AVSS−0.1V to AVDD+0.1V (PGA bypass mode)."+ },+ {+ "number": "5",+ "name": "VIN2P",+ "type": "input",+ "description": "Non-inverting input for channel 2, common-mode AVSS+1.5V to AVDD−1.5V (PGA gains 64−128) or AVSS−0.1V to AVDD+0.1V (PGA bypass mode)."+ },+ {+ "number": "6",+ "name": "VBG",+ "type": "output",+ "description": "Bandgap reference voltage output, 109mV at 25°C with 360µV/°C temperature coefficient; bypass with 0.1µF capacitor to AVSS."+ },+ {+ "number": "7",+ "name": "REFN",+ "type": "input",+ "description": "Negative reference input accepting −0.1V to REFP−1.5V (absolute max −0.3V to AVDD+0.3V)."+ },+ {+ "number": "8",+ "name": "AVSS",+ "type": "power_in",+ "description": "Analog ground, 0V reference for all analog circuits."+ },+ {+ "number": "9",+ "name": "DVSS",+ "type": "power_in",+ "description": "Digital ground, 0V reference for all digital circuits."+ },+ {+ "number": "10",+ "name": "XIN",+ "type": "input",+ "description": "External crystal oscillator input, 4.9152MHz ±3% or external clock input (absolute max −0.3V to DVDD+0.3V)."+ },+ {+ "number": "11",+ "name": "XOUT",+ "type": "output",+ "description": "External crystal oscillator output (absolute max −0.3V to DVDD+0.3V)."+ },+ {+ "number": "12",+ "name": "DRDY",+ "type": "output",+ "description": "Data Ready output (CMOS driver), VOH=0.9×DVDD and VOL=0.2×DVDD, pulled high when new conversion data available; polarity configurable via REG0x01[7]."+ },+ {+ "number": "13",+ "name": "SCLK",+ "type": "input",+ "description": "Serial clock input for I2C interface, 0−100kHz standard mode or 0−400kHz fast mode (VIH≥0.7×VDD, VIL≤0.3×VDD)."+ },+ {+ "number": "14",+ "name": "SDIO",+ "type": "bidirectional",+ "description": "Serial data input/output for I2C interface, 0−100kHz standard or 0−400kHz fast mode, open-drain output from NAU7802 (VIH≥0.7×VDD, VIL≤0.3×VDD)."+ },+ {+ "number": "15",+ "name": "DVDD",+ "type": "power_in",+ "description": "Digital power supply, 2.7V to 5.5V; must be 0.3V above AVDD when using internal LDO (absolute max −0.3V to +6.0V)."+ },+ {+ "number": "16",+ "name": "AVDD/LDO",+ "type": "power_in",+ "description": "Analog power supply from internal LDO (2.4−4.5V selectable, requires ≤1Ω ESR capacitor) or external 2.7−5.5V when LDO disabled (absolute max −0.3V to +6.0V)."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.2",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.2",+ "primary_model": "claude-haiku-4-5-20251001",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-4-6",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [],+ "pages_sent": 42,+ "cost_usd": 0.3069,+ "at": "2026-09-22T12:38:13"+ },+ "datasheet": {+ "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588929815370215424",+ "pages": 42,+ "sha256": "da3e8fd3c0d10a75",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 16,+ "described": 16,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ }+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}