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NAU7802SGI
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Nuvoton Tech Analog To Digital Converters (ADC), SOP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownNAU7802SGI
Nuvoton Tech · Analog To Digital Converters (ADC) · SOP-16
NAU7802SGI from Nuvoton Tech, in a SOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | REFP | input | Positive reference input accepting VREFN+1.5V to AVDD+0.1V (absolute max −0.3V to AVDD+0.3V). |
| 2 | VIN1N | input | Inverting input for channel 1, common-mode AVSS+1.5V to AVDD−1.5V (PGA gains 64−128) or AVSS−0.1V to AVDD+0.1V (PGA bypass mode). |
| 3 | VIN1P | input | Non-inverting input for channel 1, common-mode AVSS+1.5V to AVDD−1.5V (PGA gains 64−128) or AVSS−0.1V to AVDD+0.1V (PGA bypass mode). |
| 4 | VIN2N | input | Inverting input for channel 2, common-mode AVSS+1.5V to AVDD−1.5V (PGA gains 64−128) or AVSS−0.1V to AVDD+0.1V (PGA bypass mode). |
| 5 | VIN2P | input | Non-inverting input for channel 2, common-mode AVSS+1.5V to AVDD−1.5V (PGA gains 64−128) or AVSS−0.1V to AVDD+0.1V (PGA bypass mode). |
| 6 | VBG | output | Bandgap reference voltage output, 109mV at 25°C with 360µV/°C temperature coefficient; bypass with 0.1µF capacitor to AVSS. |
| 7 | REFN | input | Negative reference input accepting −0.1V to REFP−1.5V (absolute max −0.3V to AVDD+0.3V). |
| 8 | AVSS | power_in | Analog ground, 0V reference for all analog circuits. |
| 9 | DVSS | power_in | Digital ground, 0V reference for all digital circuits. |
| 10 | XIN | input | External crystal oscillator input, 4.9152MHz ±3% or external clock input (absolute max −0.3V to DVDD+0.3V). |
| 11 | XOUT | output | External crystal oscillator output (absolute max −0.3V to DVDD+0.3V). |
| 12 | DRDY | output | Data Ready output (CMOS driver), VOH=0.9×DVDD and VOL=0.2×DVDD, pulled high when new conversion data available; polarity configurable via REG0x01[7]. |
| 13 | SCLK | input | Serial clock input for I2C interface, 0−100kHz standard mode or 0−400kHz fast mode (VIH≥0.7×VDD, VIL≤0.3×VDD). |
| 14 | SDIO | bidirectional | Serial data input/output for I2C interface, 0−100kHz standard or 0−400kHz fast mode, open-drain output from NAU7802 (VIH≥0.7×VDD, VIL≤0.3×VDD). |
| 15 | DVDD | power_in | Digital power supply, 2.7V to 5.5V; must be 0.3V above AVDD when using internal LDO (absolute max −0.3V to +6.0V). |
| 16 | AVDD/LDO | power_in | Analog power supply from internal LDO (2.4−4.5V selectable, requires ≤1Ω ESR capacitor) or external 2.7−5.5V when LDO disabled (absolute max −0.3V to +6.0V). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Nuvoton Tech |
| Package | SOP-16 |
| Category | Data Acquisition |
| Pins | 16 |
CAD (KiCad official)
- Symbol:
NAU7802SGI - Footprint:
Package_SO:SOIC-16_3.9x9.9mm_P1.27mm - 3D model: SOP-16 (KiCad packages3D, STEP)
- 3D model files:
nau7802sgi-etched.step/nau7802sgi-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);nau7802sgi.step/nau7802sgi.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Nuvoton Tech datasheet (42 pp, sha256
da3e8fd3c0d10a75, retrieved 2026-09-22, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.2, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-4-6(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).