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NANO130SE3BN

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Nuvoton Tech Microcontroller Units (MCUs/MPUs/SOCs), LQFP-64(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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NANO130SE3BN

Nuvoton Tech · Microcontroller Units (MCUs/MPUs/SOCs) · LQFP-64(7x7)

NANO130SE3BN from Nuvoton Tech, in a LQFP-64(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 PB.14 bidirectional General purpose digital I/O pin, shared with INT0, SC2_CD, SPI2_SS1 and LCD_SEG12.
2 PB.13 bidirectional General purpose digital I/O pin, shared with EBI_AD1 and LCD_SEG11.
3 PB.12 bidirectional General purpose digital I/O pin, shared with EBI_AD0, FCLKO and LCD_SEG10.
4 X32O output External 32.768 kHz crystal output pin.
5 X32I input External 32.768 kHz crystal input pin.
6 PA.11 bidirectional General purpose digital I/O pin, shared with I2C1_SCL, EBI_nRD, SC0_RST, SPI2_MOSI0 and LCD_SEG9.
7 PA.10 bidirectional General purpose digital I/O pin, shared with I2C1_SDA, EBI_nWR, SC0_PWR, SPI2_MISO0 and LCD_SEG8.
8 PA.9 bidirectional General purpose digital I/O pin, shared with I2C0_SCL, SC0_DAT, SPI2_CLK and LCD_SEG7.
9 PA.8 bidirectional General purpose digital I/O pin, shared with I2C0_SDA, SC0_CLK, SPI2_SS0 and LCD_SEG6.
10 PB.4 bidirectional General purpose digital I/O pin, shared with UART1_RXD, SC0_CD, SPI2_SS0 and LCD_SEG5.
11 PB.5 bidirectional General purpose digital I/O pin, shared with UART1_TXD, SC0_RST, SPI2_CLK and LCD_SEG4.
12 PB.6 bidirectional General purpose digital I/O pin, shared with UART1_RTSn, EBI_ALE, SPI2_MISO0 and LCD_SEG3.
13 PB.7 bidirectional General purpose digital I/O pin, shared with UART1_CTSn, EBI_nCS, SPI2_MOSI0 and LCD_SEG2.
14 LDO_CAP power_out LDO output pin.
15 VDD power_in Power supply for I/O ports and LDO source.
16 VSS power_in Ground.
17 USB_VBUS power_in USB power supply from USB host or hub.
18 USB_VDD33_CAP power_out USB internal power regulator output 3.3V decoupling pin.
19 USB_D- bidirectional USB differential signal D-.
20 USB_D+ bidirectional USB differential signal D+.
21 PB.0 bidirectional General purpose digital I/O pin, shared with UART0_RXD, SPI1_MOSI0 and LCD_SEG1 (or LCD_COM5).
22 PB.1 bidirectional General purpose digital I/O pin, shared with UART0_TXD, SPI1_MISO0 and LCD_SEG0 (or LCD_COM4).
23 PB.2 bidirectional General purpose digital I/O pin, shared with UART0_RTSn, EBI_nWRL, SPI1_CLK and LCD_COM3.
24 PB.3 bidirectional General purpose digital I/O pin, shared with UART0_CTSn, EBI_nWRH, SPI1_SS0 and LCD_COM2.
25 PC.3 bidirectional General purpose digital I/O pin, shared with SPI0_MOSI0, I2S_DO, SC1_RST and LCD_COM1.
26 PC.2 bidirectional General purpose digital I/O pin, shared with SPI0_MISO0, I2S_DI, SC1_PWR and LCD_COM0.
27 PC.1 bidirectional General purpose digital I/O pin, shared with SPI0_CLK, I2S_BCLK, SC1_DAT and LCD_DH2 charge pump capacitor pin.
28 PC.0 bidirectional General purpose digital I/O pin / module clock output (MCLKO), shared with SPI0_SS0, I2S_LRCLK, SC1_CLK and LCD_DH1.
29 LCD_VLCD passive LCD power supply pin.
30 PB.11 bidirectional General purpose digital I/O pin, shared with PWM1_CH0, TM3, SC2_DAT, SPI0_MISO0 and LCD_V1.
31 PB.10 bidirectional General purpose digital I/O pin, shared with SPI0_SS1, TM2, SC2_CLK, SPI0_MOSI0 and LCD_V2.
32 PB.9 bidirectional General purpose digital I/O pin, shared with SPI1_SS1, TM1, SC2_RST, INT0 and LCD_V3.
33 PC.11 bidirectional General purpose digital I/O pin, shared with SPI1_MOSI0, UART1_TXD and LCD_SEG31.
34 PC.10 bidirectional General purpose digital I/O pin, shared with SPI1_MISO0, UART1_RXD and LCD_SEG30.
35 PC.9 bidirectional General purpose digital I/O pin, shared with SPI1_CLK, I2C1_SCL and LCD_SEG29.
36 PC.8 bidirectional General purpose digital I/O pin, shared with SPI1_SS0, EBI_MCLK, I2C1_SDA and LCD_SEG28.
37 PA.15 bidirectional General purpose digital I/O pin, shared with PWM0_CH3, I2S_MCLK, TC3, SC0_PWR, UART0_TXD and LCD_SEG27.
38 PA.14 bidirectional General purpose digital I/O pin, shared with PWM0_CH2, EBI_AD15, TC2, UART0_RXD and LCD_SEG26.
39 PA.13 bidirectional General purpose digital I/O pin, shared with PWM0_CH1, EBI_AD14, TC1, I2C0_SCL and LCD_SEG25.
40 PA.12 bidirectional General purpose digital I/O pin, shared with PWM0_CH0, EBI_AD13, TC0, I2C0_SDA and LCD_SEG24.
41 ICE_DAT/PF.0 bidirectional Serial wired debugger data pin, or general purpose digital I/O PF.0 shared with INT0.
42 ICE_CLK/PF.1 bidirectional Serial wired debugger clock pin, or general purpose digital I/O PF.1 shared with FCLKO and INT1.
43 AVSS power_in Ground pin for analog circuit.
44 PA.0 bidirectional General purpose digital I/O pin, shared with ADC analog input AD0 and SC2_CD.
45 PA.1 bidirectional General purpose digital I/O pin, shared with ADC analog input AD1 and EBI_AD12.
46 PA.2 bidirectional General purpose digital I/O pin, shared with AD2, EBI_AD11, UART1_RXD and LCD_SEG23 (not 5V tolerant).
47 PA.3 bidirectional General purpose digital I/O pin, shared with AD3, EBI_AD10, UART1_TXD and LCD_SEG22 (not 5V tolerant).
48 PA.4 bidirectional General purpose digital I/O pin, shared with AD4, EBI_AD9, SC2_PWR, I2C0_SDA and LCD_SEG21 (not 5V tolerant).
49 PA.5 bidirectional General purpose digital I/O pin, shared with AD5, EBI_AD8, SC2_RST, I2C0_SCL and LCD_SEG20 (not 5V tolerant).
50 PA.6 bidirectional General purpose digital I/O pin, shared with AD6, EBI_AD7, TC3, SC2_CLK, PWM0_CH3 and LCD_SEG19 (not 5V tolerant).
51 VREF power_in Voltage reference input for ADC.
52 AVDD power_in Power supply for internal analog circuit.
53 PC.7 bidirectional General purpose digital I/O pin, shared with DA1_OUT, EBI_AD5, TC1, PWM0_CH1 and LCD_SEG17.
54 PC.6 bidirectional General purpose digital I/O pin, shared with DA0_OUT, EBI_AD4, TC0, SC1_CD and PWM0_CH0.
55 PC.15 bidirectional General purpose digital I/O pin, shared with EBI_AD3, TC0, PWM1_CH2 and LCD_SEG16.
56 PC.14 bidirectional General purpose digital I/O pin, shared with EBI_AD2, PWM1_CH3 and LCD_SEG15.
57 PB.15 bidirectional General purpose digital I/O pin, shared with INT1, SNOOPER, SC1_CD and LCD_SEG14.
58 XT1_IN input External 4~24 MHz crystal pin (shared with general purpose I/O PF.3).
59 XT1_OUT output External 4~24 MHz crystal pin (shared with general purpose I/O PF.2).
60 nRESET input External reset input, active low; setting this pin low resets the chip to its initial state, with internal pull-up.
61 VSS power_in Ground.
62 VDD power_in Power supply for I/O ports and LDO source for internal PLL and digital circuit.
63 PVSS power_in PLL ground.
64 PB.8 bidirectional General purpose digital I/O pin, shared with STADC, TM0, INT0, SC2_PWR and LCD_SEG13.

Key specifications

Parameter Value
Manufacturer Nuvoton Tech
Package LQFP-64(7x7)
Category Single Chip Microcomputer/Microcontroller
Pins 64

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
DC Power Supply VDD-VSS -0.3 4 V 139
Input Voltage on 5V Tolerance Pin VIN -0.3 3.7 V max printed as VDD +3.7 V 139
Input Voltage on Any Other Pin without 5V Tolerance VIN -0.3 0.3 V max printed as VDD +0.3 V 139
Oscillator Frequency 1/tCLCL 4 24 MHz 139
Operating Temperature TA -40 85 °C 139
Storage Temperature TST -55 150 °C 139
Maximum Current into VDD 150 mA 139
Maximum Current out of VSS 150 mA 139
Maximum Current Sunk by an I/O Pin 25 mA 139
Maximum Current Sourced by an I/O Pin 25 mA 139
Maximum Current Sunk by Total I/O Pins 100 mA 139
Maximum Current Sourced by Total I/O Pins 100 mA 139
Operation voltage VDD 1.8 3.6 V VDD =1.8V up to 42 MHz 139
LDO Output Voltage (Run/Idle) VLDO1 1.62 1.8 1.98 V MCU operating in Run or Idle mode 139
LDO Output Voltage (Power-down) VLDO2 1.49 1.66 1.83 V MCU operating in Power-down mode 139
Reference Voltage Vref 1.8 V max printed as AVDD 140
Input Leakage Current ILK -0.1 0.1 A VDD = 3.3V, 0<VIN<VDD 143
Input Low Voltage Schmitt PA-PF VIL1 0.4 V max printed as 0.4VDD 144
Input High Voltage Schmitt PA-PF VIH1 0.6 5.5 V min printed as 0.6VDD 144
Input Low Voltage XT1_IN/XT1_OUT VIL2 0 0.4 V VDD = 1.8V 144
Input High Voltage XT1_IN/XT1_OUT VIH2 1.5 V VDD = 1.8V; max printed VDD+0.2 144
Input Low Voltage X32I/X32O VIL4 0 0.3 V 144
Input High Voltage X32I/X32O VIH4 1.5 1.98 V 144
Negative going threshold /RESET VILS 1.28 1.33 1.37 V VDD = 3.3V 144
Positive going threshold /RESET VIHS 1.75 1.98 2.25 V VDD = 3.3V 144
Source Current PA-PF ISR21 -10 -14 mA VDD = 3.3V, VS = Vdd-0.7V 144
Source Current PA-PF ISR22 -3 -5 mA VDD = 1.8V, VS = Vdd-0.45V 144
Sink Current PA-PF ISK21 10 15 mA VDD = 3.3V, VS = 0.7V 144
Sink Current PA-PF ISK22 3 6 mA VDD = 1.8V, VS = 0.45V 144
Hysteresis voltage PA~PF VHY 0.2 V printed as 0.2VDD 144
Input Pull Up Resistor RIN 40 KΩ VDD = 3.3V 143
Input Pull Up Resistor RIN 98 KΩ VDD = 1.8V 143
Clock High Time tCHCX 10 nS 145
Clock Low Time tCLCX 10 nS 145
Clock Rise Time tCLCH 2 15 nS 145
Clock Fall Time tCHCL 2 15 nS 145
HXT Oscillator frequency fHXT 4 12 24 MHz VDD = 1.8V ~ 3.6V 145
HXT Temperature THXT -40 85 °C 145
Calibrated Internal Oscillator Frequency FHRC 11.88 12 12.12 MHz 25oC, VDD = 3V 146
Calibrated Internal Oscillator Frequency FHRC 11.76 12 12.24 MHz -40oC~+85 oC, VDD = 1.8V~3.6V 146
Calibrated Internal Oscillator Frequency FHRC 11.97 12 12.03 MHz -40oC~+85 oC, VDD = 1.8V~3.6V, Enable 32.768K crystal oscillator and set TRIM_SEL[1:0]="10" 146
Internal 10 kHz Center Frequency FLRC 7 10 13 kHz 25oC, VDD = 3V 146
Internal 10 kHz Center Frequency FLRC 5 10 15 kHz -40oC~+85 oC, VDD = 1.8V~3.6V 146
ADC Operating voltage AVDD 1.8 3.6 V AVDD = VDD 146
ADC Integral Non-Linearity Error INL 1 2 LSB VREF is external Vref pin; printed ±1, ±2 147
ADC Differential Non-Linearity DNL -1 0.8 1.5 LSB VREF is external Vref pin; typ printed ±0.8 147
ADC Gain error EG 2 LSB VREF is external Vref pin; printed ±2 147
ADC Offset error EOFFSET 3 LSB VREF is external Vref pin; printed ±3 147
ADC Absolute error EABS 6 LSB VREF is external Vref pin; printed ±6 147
ADC Clock frequency FADC 0.25 42 MHz 147
BOD17 detection level VB17dt 1.6 1.7 1.8 V 25C 147
BOD20 detection level VB20dt 1.9 2 2.1 V 25oC 147
BOD25 detection level VB25dt 2.4 2.5 2.6 V 25oC 147
Temperature Sensor Gain VTG -1.8 -1.73 -1.65 mV/oC Supply voltage = 3.36V 148
Temperature Sensor Offset VTO 730 740 750 mV Temperature at 0 oC 148
1.8V voltage reference VREF1 1.69 1.8 1.87 V AVDD ≥ 2.0V (-40C ~85C) 149
2.5V voltage reference VREF2 2.35 2.5 2.6 V AVDD ≥ 2.8V (-40C ~85C) 149
DAC Operating voltage AVDD 2 3.6 V AVDD = VDD 148
DAC Integral Non-Linearity Error INL 4 5 LSB VREF is external Vref pin; Not include offset and gain error; printed ±4, ±5 148
Flash Supply Voltage VFLA 1.62 1.8 1.98 V 151
Flash Endurance NENDUR 20000 cycles 151
Flash Data Retention TRET 100 year TA = 25℃ 151
USB LDO Output voltage V33 2.97 3.3 3.63 V VBUS = 5V, 25C 150

CAD (KiCad official)

  • Symbol: NANO130SE3BN
  • Footprint: Package_QFP:LQFP-64_7x7mm_P0.4mm
  • 3D model: LQFP-64(7x7) (KiCad packages3D, STEP)
  • 3D model files: nano130se3bn-etched.step / nano130se3bn-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); nano130se3bn.step / nano130se3bn.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Nuvoton Tech datasheet (160 pp, sha256 5bb81dbb3abf4f6e, retrieved 2026-10-27, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF