component

N32G455REL7

Public Made by Adom

by adom

Nations Technologies Inc Microcontrollers (MCU/MPU/SOC), LQFP-64(10x10). Datasheet-verified pinout, KiCad symbol/footprint/3D.

componentmcun32g455rel7
Overview Files Discover Packages Releases Dependencies Issues Breadcrumbs Pull Requests Activity

3D Model

Open in new tab ↗
Loads on click. Unloads only if this page sits in the background.

Symbol & Footprint

Schematic Symbol

Open full view ↗
Loads on click. Unloads only if this page sits in the background.

PCB Footprint

Open full view ↗
Loads on click. Unloads only if this page sits in the background.

Datasheet

Open in new tab ↗
Loads on click. Unloads only if this page sits in the background.
Download PDF
Contents

README

markdown

N32G455REL7

Nations Technologies Inc · Microcontrollers (MCU/MPU/SOC) · LQFP-64(10x10)

N32G455REL7 from Nations Technologies Inc, in a LQFP-64(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VBAT power_in Backup battery supply for RTC and backup registers when VDD is off. 1.8 V to 3.6 V.
2 PC13-TAMPER-RTC bidirectional GPIO port C bit 13; also RTC tamper input / RTC output. Powered from the VBAT domain switch, limited to 3 mA drive, 2 MHz, 30 pF and cannot source current (not for driving LEDs).
3 PC14-OSC32_IN bidirectional GPIO port C bit 14; default function is 32.768 kHz LSE crystal input (OSC32_IN). Backup-domain pin, tolerant TC level.
4 PC15-OSC32_OUT bidirectional GPIO port C bit 15; default function is 32.768 kHz LSE crystal output (OSC32_OUT). Backup-domain pin, tolerant TC level.
5 OSC_IN/PD0 input HSE crystal oscillator input (4-32 MHz) after reset; software can remap to GPIO PD0.
6 OSC_OUT/PD1 output HSE crystal oscillator output after reset; software can remap to GPIO PD1.
7 NRST bidirectional Active-low bidirectional reset. Internal pull-up; drive low externally to reset.
8 PC0 bidirectional GPIO PC0. Alt: ADC12_IN6, I2C3_SCL, COMP7_INM, UART6_TX. TTa (3.3 V analog-capable) level.
9 PC1 bidirectional GPIO PC1. Alt: ADC12_IN7, I2C3_SDA, COMP7_INP, UART6_RX.
10 PC2 bidirectional GPIO PC2. Alt: ADC12_IN8, COMP7_OUT, UART7_TX, SPI3_NSS/I2S3_WS.
11 PC3 bidirectional GPIO PC3. Alt: ADC12_IN9, UART7_RX, SPI3_SCK/I2S3_CK, OPAMP3/4_VINP, COMP5_INP.
12 VSSA/VREF- power_in Analog ground / ADC/DAC negative reference. On LQFP64, VSSA and VREF- are combined into this single pin.
13 VDDA/VREF+ power_in Analog supply / ADC/DAC positive reference (1.8-3.6 V). On LQFP64, VDDA and VREF+ share this pin.
14 PA0-WKUP bidirectional GPIO PA0 and Standby-mode wake-up. Alt: USART2_CTS, ADC1_IN1, TIM2_CH1_ETR, TIM5_CH1, TIM8_ETR, COMP1_OUT/INM, SPI3_MISO.
15 PA1 bidirectional GPIO PA1. Alt: USART2_RTS, ADC1_IN2, TIM5_CH2, TIM2_CH2, OPAMP1_VINP, OPAMP3_VINP, SPI3_MOSI/I2S3_SD, COMP1_INP.
16 PA2 bidirectional GPIO PA2. Alt: USART2_TX, TIM5_CH3, TIM2_CH3, ADC12_IN11, OPAMP1_INM, OPAMP2_INM, COMP2_OUT.
17 PA3 bidirectional GPIO PA3. Alt: USART2_RX, TIM5_CH4, ADC1_IN4, TIM2_CH4, OPAMP1_VINM, OPAMP1_VINP, COMP5_INP.
18 VSS_4 power_in Digital ground.
19 VDD_4 power_in Digital supply (1.8-3.6 V). Decouple with 100 nF near pin.
20 PA4 bidirectional GPIO PA4. Alt: SPI1_NSS, USART2_CK, DAC_OUT1, ADC2_IN1, QSPI_NSS, TSC_CHN0, COMP1/2/3/4/5/6/7_INM, OPAMP4_VINP, I2C2_SCL.
21 PA5 bidirectional GPIO PA5. Alt: SPI1_SCK, DAC_OUT2, ADC2_IN2, QSPI_SCK, TSC_CHN1, COMP1..7_INM, OPAMP1/2/3_VINP/VINM, I2C2_SDA.
22 PA6 bidirectional GPIO PA6. Alt: SPI1_MISO, TIM8_BKIN, ADC1_IN3, TIM3_CH1, COMP1_OUT, TIM1_BKIN, OPAMP1_VOUT, COMP2_OUT.
23 PA7 bidirectional GPIO PA7. Alt: SPI1_MOSI, TIM8_CH1N, ADC2_IN4, TIM3_CH2, QSPI_IO0/1, COMP2_OUT/INP, OPAMP1_VINP, OPAMP2_VINP, COMP6_INM, TIM1_CH1N.
24 PC4 bidirectional GPIO PC4. Alt: I2C3_SCL, ADC2_IN5, QSPI_IO2, UART7_TX, OPAMP3_VINM, COMP4_INM, COMP5_INP.
25 PC5 bidirectional GPIO PC5. Alt: I2C3_SDA, ADC2_IN12, QSPI_IO3, UART7_RX, OPAMP4_VINP, COMP4_OUT, COMP6_INP.
26 PB0 bidirectional GPIO PB0. Alt: ADC3_IN12, TIM3_CH3, TIM8_CH2N, UART6_TX, OPAMP2_VINP, COMP3_INP, COMP5_OUT, TIM1_CH2N.
27 PB1 bidirectional GPIO PB1. Alt: ADC2_IN3, TIM3_CH4, TIM8_CH3N, COMP4_OUT, UART6_RX, OPAMP2_VOUT, COMP2_INM, TIM1_CH3N.
28 PB2-BOOT1 bidirectional GPIO PB2 and BOOT1 boot mode select. Alt: ADC2_IN13, COMP1_OUT, UART4_TX, SPI1_NSS, TIM1_ETR.
29 PB10 bidirectional GPIO PB10. Alt: I2C2_SCL, USART3_TX, TIM2_CH3, COMP5_INM, OPAMP3_VINM, OPAMP4_VINM, XFMC_D11, COMP1_INP, COMP3_OUT.
30 PB11 bidirectional GPIO PB11. Alt: I2C2_SDA, USART3_RX, ADC3_IN1, TIM2_CH4, XFMC_D12, OPAMP3_VOUT, COMP2_INP, COMP5_OUT.
31 VSS_1 power_in Digital ground.
32 VDD_1 power_in Digital supply (1.8-3.6 V).
33 PB12 bidirectional GPIO PB12. Alt: SPI2_NSS/I2S2_WS, I2C2_SMBA, USART3_CK, TIM1_BKIN, CAN2_RX, ADC4_IN3, COMP3_INM, OPAMP4_VOUT, COMP4_OUT.
34 PB13 bidirectional GPIO PB13. Alt: SPI2_SCK/I2S2_CK, USART3_CTS, TIM1_CH1N, CAN2_TX, ADC3_IN5, UART5_TX, COMP4_INM.
35 PB14 bidirectional GPIO PB14. Alt: SPI2_MISO, TIM1_CH2N, USART3_RTS, COMP3_INP, UART5_RX.
36 PB15 bidirectional GPIO PB15. Alt: SPI2_MOSI/I2S2_SD, TIM1_CH3N, ADC4_IN4/5, TSC_CHN2/3, COMP4_INP, USART3_TX, OPAMP4_VINM.
37 PC6 bidirectional GPIO PC6. Alt: I2S2_MCK, TIM8_CH1, SDIO_D6, I2C4_SCL, TSC_CHN8, TIM3_CH1, SPI2_NSS/I2S2_WS, USART2_CTS, XFMC_A16.
38 PC7 bidirectional GPIO PC7. Alt: I2S3_MCK, TIM8_CH2, SDIO_D7, I2C4_SDA, TSC_CHN9, TIM3_CH2, SPI2_SCK/I2S2_CK, USART2_RTS, XFMC_A17.
39 PC8 bidirectional GPIO PC8. Alt: TIM8_CH3, SDIO_D0, TSC_CHN10, TIM3_CH3, SPI2_MISO, USART2_TX.
40 PC9 bidirectional GPIO PC9. Alt: TIM8_CH4, SDIO_D1, TSC_CHN11, TIM3_CH4, SPI2_MOSI/I2S2_SD, USART2_RX, COMP6_OUT, XFMC_NOE, OPAMP3_INP, OPAMP4_INM, COMP3_INP4.
41 PA8 bidirectional GPIO PA8. Alt: USART1_CK, TIM1_CH1, MCO (master clock output). 5 V tolerant.
42 PA9 bidirectional GPIO PA9. Alt: USART1_TX, TIM1_CH2, TSC_DOUT, I2C4_SCL. 5 V tolerant.
43 PA10 bidirectional GPIO PA10. Alt: USART1_RX, TIM1_CH3, I2C4_SDA, XFMC_MWE. 5 V tolerant.
44 PA11 bidirectional GPIO PA11 / USB D- (USBDM). Alt: USART1_CTS, CAN1_RX, TIM1_CH4, COMP1_OUT, COMP5_OUT. 5 V tolerant.
45 PA12 bidirectional GPIO PA12 / USB D+ (USBDP). Alt: USART1_RTS, CAN1_TX, TIM1_ETR, COMP2_OUT, COMP6_OUT. 5 V tolerant.
46 PA13 bidirectional GPIO PA13; default JTMS/SWDIO after reset. Alt: UART4_TX. 5 V tolerant.
47 VSS_2 power_in Digital ground.
48 VDD_2 power_in Digital supply (1.8-3.6 V).
49 PA14 bidirectional GPIO PA14; default JTCK/SWCLK after reset. Alt: UART4_RX. 5 V tolerant.
50 PA15 bidirectional GPIO PA15; default JTDI after reset. Alt: SPI3_NSS/I2S3_WS, SPI1_NSS, USART2_CTS, TIM2_CH1_ETR. 5 V tolerant.
51 PC10 bidirectional GPIO PC10. Alt: UART4_TX, SDIO_D2, TSC_CHN12, TIM8_CH1N, USART3_TX, SPI3_SCK/I2S3_CK.
52 PC11 bidirectional GPIO PC11. Alt: UART4_RX, SDIO_D3, TSC_CHN13, USART3_RX, SPI3_MISO, QSPI_SCK, QSPI_NSS, COMP3_OUT, COMP4_OUT.
53 PC12 bidirectional GPIO PC12. Alt: UART5_TX, SDIO_CK, TSC_CHN14, USART3_CK, SPI3_MOSI/I2S3_SD, QSPI_IO0.
54 PD2 bidirectional GPIO PD2. Alt: TIM3_ETR, UART5_RX, SDIO_CMD, TSC_CHN15, SPI3_NSS/I2S3_WS, QSPI_IO3, TIM8_CH3N.
55 PB3 bidirectional GPIO PB3; default JTDO/TRACESWO after reset. Alt: SPI3_SCK/I2S3_CK, TIM2_CH2, SPI1_SCK, USART2_RTS, TIM8_BKIN. 5 V tolerant.
56 PB4 bidirectional GPIO PB4; default NJTRST after reset. Alt: SPI3_MISO, TIM3_CH1, SPI1_MISO, USART2_TX, TIM8_ETR. 5 V tolerant.
57 PB5 bidirectional GPIO PB5. Alt: I2C1_SMBA, SPI3_MOSI/I2S3_SD, TIM3_CH2, SPI1_MOSI, CAN2_RX. 5 V tolerant.
58 PB6 bidirectional GPIO PB6. Alt: I2C1_SCL, TIM4_CH1, TSC_CHN20, USART1_TX, CAN2_TX, COMP5_OUT, XFMC_NE2, XFMC_NCE3, USART2_RX, TIM1_BKIN.
59 PB7 bidirectional GPIO PB7. Alt: I2C1_SDA, XFMC_NADV, TIM4_CH2, TSC_CHN21, USART1_RX, COMP6_OUT.
60 BOOT0 input Boot mode select input, latched at reset. With BOOT1 (PB2) selects boot from Main Flash / System memory (bootloader) / SRAM.
61 PB8 bidirectional GPIO PB8. Alt: TIM4_CH3, SDIO_D4, COMP1_OUT, TSC_CHN22, I2C1_SCL, CAN1_RX, UART5_TX, XFMC_NWAIT.
62 PB9 bidirectional GPIO PB9. Alt: TIM4_CH4, SDIO_D5, COMP2_OUT, TSC_CHN23, TIM4_ETR, I2C1_SDA, CAN1_TX, UART5_RX, XFMC_NE1, XFMC_NCE2.
63 VSS_3 power_in Digital ground.
64 VDD_3 power_in Digital supply (1.8-3.6 V).

Key specifications

Parameter Value
Manufacturer Nations Technologies Inc
Package LQFP-64(10x10)
Category MCU
Pins 64

Ordering variants

Same part, different packaging or reel option.

  • N32G455CBL7
  • N32G455CCL7
  • N32G455RBL7
  • N32G455RCL7
  • N32G455REL7
  • N32G455MBL7
  • N32G455MCL7
  • N32G455MEL7
  • N32G455VBL7
  • N32G455VCL7
  • N32G455VEL7

CAD (KiCad official)

  • Symbol: N32G455REL7
  • Footprint: Package_QFP:LQFP-64_10x10mm_P0.5mm
  • 3D model: LQFP-64(10x10) (KiCad packages3D, STEP)

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Nations Technologies Inc datasheet (97 pp, sha256 3f5e47dab158b716, retrieved 2026-08-17, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF