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N32G432CBL7

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Nations Technologies Inc Microcontroller Units (MCUs/MPUs/SOCs), LQFP-48(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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N32G432CBL7

Nations Technologies Inc · Microcontroller Units (MCUs/MPUs/SOCs) · LQFP-48(7x7)

N32G432CBL7 from Nations Technologies Inc, in a LQFP-48(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VDD power_in Digital supply for I/O pins and internal regulator, 1.8-3.6V.
2 PC13-TAMPER-RTC bidirectional GPIO with TIM1_CH1N, EVENTOUT, TAMP1-RTC, RTC_OUT, WKUP2; sinks limited current (3mA), only one of PC13-15 as output at a time, 2MHz max, 30pF load.
3 PC14-OSC32_IN bidirectional GPIO or 32.768kHz LSE oscillator input (OSC32_IN); limited to 3mA current as output.
4 PC15-OSC32_OUT bidirectional GPIO or 32.768kHz LSE oscillator output (OSC32_OUT); limited to 3mA current as output.
5 PD14-OSC_IN bidirectional GPIO or HSE 4-32MHz oscillator input (OSC_IN); alternate USART2_TX, I2C2_SDA, TIM1_CH3N; not fail-safe.
6 PD15-OSC_OUT bidirectional GPIO or HSE 4-32MHz oscillator output (OSC_OUT); alternate USART2_RX, I2C2_SCL; not fail-safe.
7 NRST input Active-low external reset input with internal weak pull-up (typ. 50kΩ).
8 VSSA/VREF- power_in Analog ground and ADC negative reference, connected to VSS.
9 VDDA/VREF+ power_in Analog supply and positive reference for ADC/DAC, 1.8-3.6V, must be connected to VDD.
10 PA0 bidirectional GPIO with USART2_CTS, LPUART_RX, TIM2_CH1, TIM5_CH1, SPI1_MISO, ADC_IN1, WKUP1, TAMP2-RTC.
11 PA1 bidirectional GPIO with USART2_RTS, LPUART_TX, TIM5_CH2, TIM2_CH2, ADC1_IN2.
12 PA2 bidirectional GPIO with USART2_TX, TIM5_CH3, TIM2_CH3, I2C2_SDA, ADC_IN3.
13 PA3 bidirectional GPIO with USART2_RX, LPUART_RX, TIM5_CH4, I2C2_SCL, ADC_IN4.
14 PA4 bidirectional GPIO with USART2_CK, LPUART_TX, SPI1_NSS, I2S1_WS, DAC_OUT, ADC_IN5; not fail-safe.
15 PA5 bidirectional GPIO with SPI1_SCK, I2C1_SDA, I2S1_CK, USART1_RX, ADC_IN6.
16 PA6 bidirectional GPIO with LPUART_CTS, SPI1_MISO, I2S1_MCK, TIM8_BKIN, TIM3_CH1, TIM1_BKIN, ADC_IN7.
17 PA7 bidirectional GPIO with SPI1_MOSI, I2S1_SD, TIM1_CH1N, TIM8_CH1N, TIM3_CH2, ADC_IN8.
18 PB0 bidirectional GPIO with TIM1_CH2N, TIM3_CH3, TIM8_CH2N, UART4_TX, ADC_IN9.
19 PB1 bidirectional GPIO with LPUART_RTS, TIM1_CH3N, TIM3_CH4, TIM8_CH3N, UART4_RX, ADC_IN10.
20 PB2 bidirectional GPIO with LPTIM_OUT, TIM9_ETR, EVENTOUT.
21 PB10 bidirectional GPIO with USART3_TX, LPUART_TX, I2C2_SCL, TIM2_CH3.
22 PB11 bidirectional GPIO with USART3_RX, LPUART_RX, I2C2_SDA, TIM2_CH4.
23 VSS power_in Digital ground.
24 VDD power_in Digital supply for I/O pins and internal regulator, 1.8-3.6V.
25 PB12 bidirectional GPIO with SPI2_NSS, I2S2_WS, I2C2_SMBA, USART3_CK, TIM1_BKIN, LPUART_RTS, TIM9_CH1.
26 PB13 bidirectional GPIO; pin number and name taken from the LQFP48 pin diagram, alternate functions not in provided text.
27 PB14 bidirectional GPIO; pin number and name taken from the LQFP48 pin diagram, alternate functions not in provided text.
28 PB15 bidirectional GPIO; pin number and name taken from the LQFP48 pin diagram, alternate functions not in provided text.
29 PA8 bidirectional GPIO; pin number and name taken from the LQFP48 pin diagram, alternate functions not in provided text.
30 PA9 bidirectional GPIO; pin number and name taken from the LQFP48 pin diagram, alternate functions not in provided text.
31 PA10 bidirectional GPIO; pin number and name taken from the LQFP48 pin diagram, alternate functions not in provided text.
32 PA11-USB_DM bidirectional GPIO or USB full-speed D- (USB_DM); pin number inferred from diagram order.
33 PA12-USB_DP bidirectional GPIO with USART1_RTS, SPI2_MOSI, I2S2_SD, CAN_TX, TIM1_ETR, or USB_DP; not fail-safe.
34 PA13 bidirectional GPIO with SWDIO/JTMS, SPI2_NSS, I2S2_WS.
35 VSS power_in Digital ground.
36 VDD power_in Digital supply for I/O pins and internal regulator, 1.8-3.6V.
37 PA14 bidirectional GPIO with SWCLK/JTCK, USART2_CK, I2C1_SDA.
38 PA15 bidirectional GPIO with JTDI, USART2_CTS, I2C1_SCL, SPI2_NSS, I2S2_WS, TIM2_CH1/ETR.
39 PB3 bidirectional GPIO with USART2_RTS, SPI1_SCK, I2S1_CK, TIM2_CH2, JTDO/TRACESWO.
40 PB4 bidirectional GPIO with USART2_TX, SPI1_MISO, I2S1_MCK, TIM3_CH1, UART5_TX.
41 PB5 bidirectional GPIO with USART2_RX, I2C1_SMBA, SPI1_MOSI, I2S1_SD, TIM3_CH2, UART5_RX, LPTIM_IN1.
42 PB6 bidirectional GPIO with USART1_TX, LPUART_TX, I2C1_SCL, SPI1_NSS, I2S1_WS, TIM1_CH2N, TIM4_CH1, SPI2_SCK, I2S2_CK, LPTIM_ETR.
43 PB7 bidirectional GPIO with USART1_RX, LPUART_RX, I2C1_SDA, TIM4_CH2, LPTIM_IN2, PVD_IN.
44 BOOT0/PD0 input Boot mode selection input (input pull-down after reset), also GPIO PD0 with TRACECK.
45 PB8 bidirectional GPIO with I2C1_SCL, CAN_RX, TIM4_CH3, USART1_TX, UART5_TX.
46 PB9 bidirectional GPIO with I2C1_SDA, CAN_TX, TIM4_CH4, UART5_RX.
47 VSS power_in Digital ground.
48 VDD power_in Digital supply for I/O pins and internal regulator, 1.8-3.6V.

Key specifications

Parameter Value
Manufacturer Nations Technologies Inc
Package LQFP-48(7x7)
Category Single Chip Microcomputer/Microcontroller
Pins 48

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Input low voltage VIL 0.8 V VDD=3.3V 53
Input high voltage VIH 2 V VDD=3.3V 53
Schmitt trigger hysteresis Vhys 200 mV VDD=3.3V/2.5V 53
Input leakage current Ilkg -1 1 μA VDD=Maximum, VPAD=0 or VPAD=VDD 53
Weak pull-up equivalent resistance RPU 90 170 kΩ VDD=3.3V, VIN=VSS 53
Weak pull-down equivalent resistance RPD 90 170 kΩ VDD=3.3V, VIN=VDD 53
Output low voltage VOL 0.4 V VDD=3.3V, IOL=2mA, 4mA, 8mA, and 12mA 54
Output high voltage VOH 2.4 V VDD=3.3V, IOH=-2mA, -4mA, -8mA, and -12mA 54
NRST input low voltage VIL(NRST) 0.8 V VDD=3.3V 55
NRST input high voltage VIH(NRST) 2 V VDD=3.3V 55
NRST weak pull-up resistance RPU 40 50 60 kΩ VDD=3.3V 55
USB operating voltage VDD 3 3.6 V 62
ADC supply voltage VDDA 1.8 3.6 V external reference voltage 63
ADC clock frequency fADC 72 MHz 63
ADC total unadjusted error ET 1.3 5 LSB fADC=72MHz, VDDA=3.3V, TA=25°C, VREF+=VDDA 64

CAD (KiCad official)

  • Symbol: N32G432CBL7
  • Footprint: Package_QFP:LQFP-48_7x7mm_P0.5mm
  • 3D model: LQFP-48(7x7) (KiCad packages3D, STEP)
  • 3D model files: n32g432cbl7-etched.step / n32g432cbl7-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); n32g432cbl7.step / n32g432cbl7.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Nations Technologies Inc datasheet (73 pp, sha256 1052fd1feba72eb4, retrieved 2026-10-23, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF