main
Download ZIP Propose a change
Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 17d ago
viewers mx27524s: viewers · Ray 17d ago
mx27524s-etched.glb mx27524s: factory component page (tier=lcsc) · Ray 17d ago
mx27524s-etched.step mx27524s: factory component page (tier=lcsc) · Ray 17d ago
mx27524s-hero.glb mx27524s: hero GLB from the etched model (keeps the MPN mark) · Ray 17d ago
mx27524s-hero.overlay.json Publish 0.1.0 · Ray 17d ago
mx27524s.glb Publish 0.1.0 · Ray 17d ago
mx27524s.kicad_mod Publish 0.1.0 · Ray 17d ago
mx27524s.kicad_sym Publish 0.1.0 · Ray 17d ago
mx27524s.lbr Publish 0.1.0 · Ray 17d ago
mx27524s.step Publish 0.1.0 · Ray 17d ago
package.json Publish 0.1.0 · Ray 17d ago
page.json Set visibility: public · Ray 17d ago
README.md Publish 0.1.0 · Ray 17d ago

MX27524S

Wuxi Maxinmicro · Gate Drivers · SOP-8

MX27524S from Wuxi Maxinmicro, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 ENA input Channel A enable input: logic high enables OUTA (state set by INA), logic low holds OUTA low regardless of INA, and a floating pin is treated as logic high by an internal pull-up.
2 INA input Channel A logic input with CMOS/TTL thresholds (VIN_L 0.9-1.5 V, VIN_H 1.8-2.4 V) and an internal 400 kΩ pull-down to GND.
3 GND power_in Ground; the common ground reference for the device, which should be kept separate from high-current output and power ground paths.
4 INB input Channel B logic input with CMOS/TTL thresholds (VIN_L 0.9-1.5 V, VIN_H 1.8-2.4 V) and an internal 400 kΩ pull-down to GND.
5 OUTB output Channel B gate-drive output capable of sourcing and sinking 5 A peak; pulses below 200 ns may swing from -2.0 V to VCC+0.3 V.
6 VCC power_in Supply voltage, 4.5 V to 20 V recommended; the internal UVLO holds the outputs low while VCC is below the rising threshold (3.1-3.5 V typ. 3.3 V).
7 OUTA output Channel A gate-drive output capable of sourcing and sinking 5 A peak; pulses below 200 ns may swing from -2.0 V to VCC+0.3 V.
8 ENB input Channel B enable input: logic high enables OUTB (state set by INB), logic low holds OUTB low regardless of INB, and a floating pin is treated as logic high by an internal pull-up.

Key specifications

Parameter Value
Manufacturer Wuxi Maxinmicro
Package SOP-8
Category Motor Driver ICs
Pins 8

CAD (KiCad official)

  • Symbol: MX27524S
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOP-8 (KiCad packages3D, STEP)
  • 3D model files: mx27524s-etched.step / mx27524s-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); mx27524s.step / mx27524s.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Wuxi Maxinmicro datasheet (15 pp, sha256 28b393cae87f765b, retrieved 2026-10-09, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF