component
MX25R1635FM1IL0
Public Made by Adomby adom
MXIC(Macronix) NOR FLASH, SOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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MX25R1635FM1IL0
MXIC(Macronix) · NOR FLASH · SOP-8
MX25R1635FM1IL0 from MXIC(Macronix), in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | CS# | input | Chip Select input. |
| 2 | SO/SIO1 | bidirectional | Serial Data Output (for 1 x I/O) or Serial Data Input & Output (for 2 x I/O and 4 x I/O read modes). |
| 3 | WP#/SIO2 | bidirectional | Write Protection (active low) or Serial Data Input & Output for 4 x I/O read mode; internal pull-up is active while the pin is not physically connected. |
| 4 | GND | power_in | Ground. |
| 5 | SI/SIO0 | bidirectional | Serial Data Input (for 1 x I/O) or Serial Data Input & Output (for 4 x I/O read mode). |
| 6 | SCLK | input | Clock input. |
| 7 | RESET#/SIO3 | bidirectional | Hardware Reset pin (active low) or Serial Data Input & Output for 4 x I/O read mode; this part number (M1IL0) uses the RESET# option, and the internal pull-up is active while the pin is not physically connected. |
| 8 | VCC | power_in | Power supply, 1.65V-3.6V for read, erase and program operations. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | MXIC(Macronix) |
| Package | SOP-8 |
| Category | Memory |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Ambient Operating Temperature (Industrial) | -40 | 85 | °C | Industrial grade | 64 | ||
| Storage Temperature | -65 | 150 | °C | 64 | |||
| Applied Input Voltage | -0.5 | V | -0.5V to VCC+0.5V | 64 | |||
| Applied Output Voltage | -0.5 | V | -0.5V to VCC+0.5V | 64 | |||
| VCC to Ground Potential | VCC | -0.5 | 4 | V | MX25R (1.65V-3.6V) | 64 | |
| Operation Voltage | VCC | 1.65 | 3.6 | V | Read, Erase and Program Operations | 4 | |
| Input Capacitance | CIN | 6 | pF | TA = 25°C, f = 1.0 MHz, VIN = 0V | 64 | ||
| Output Capacitance | COUT | 8 | pF | TA = 25°C, f = 1.0 MHz, VOUT = 0V | 64 | ||
| Input Load Current | ILI | -2 | 2 | uA | VCC = VCC Max, VIN = VCC or GND | 66 | |
| Output Leakage Current | ILO | -2 | 2 | uA | VCC = VCC Max, VOUT = VCC or GND | 66 | |
| VCC Standby Current | ISB1 | 5 | 24 | uA | VIN = VCC or GND, CS# = VCC | 66 | |
| Deep Power-down Current | ISB2 | 0.007 | 0.35 | uA | VIN = VCC or GND, CS# = VCC | 66 | |
| VCC Read Current | ICC1 | 2.8 | 4.5 | mA | f=16MHz (4x I/O), SCLK=0.1VCC/0.9VCC, SO=Open | 66 | |
| VCC Read Current | ICC1 | 2.2 | 4 | mA | f=33MHz, SCLK=0.1VCC/0.9VCC, SO=Open | 66 | |
| VCC Read Current | ICC1 | 1.9 | 3.5 | mA | f=8MHz (2x I/O), SCLK=0.1VCC/0.9VCC, SO=Open | 66 | |
| VCC Program Current (PP) | ICC2 | 3.5 | 6 | mA | Program in Progress, CS# = VCC | 66 | |
| VCC Write Status Register (WRSR) Current | ICC3 | 3.1 | 6 | mA | Program status register in progress, CS#=VCC | 66 | |
| VCC Sector/Block (64K) Erase Current (SE/BE) | ICC4 | 3.1 | 6 | mA | Erase in Progress, CS#=VCC | 66 | |
| VCC Chip Erase Current (CE) | ICC5 | 3.1 | 6 | mA | Erase in Progress, CS#=VCC | 66 | |
| High Voltage Applied at WP# pin | Vhv | 7 | 8 | V | Test Condition, VCC=2.0V | 66 | |
| Input Low Voltage | VIL | -0.5 | V | Max printed as 0.2VCC | 66 | ||
| Output Low Voltage | VOL | 0.2 | V | IOL = 100uA | 66 | ||
| Clock Frequency (FAST_READ, RDSFDP, PP, SE, BE32K, BE, CE, DP, RES, WREN, WRDI, RDID, RDSR, WRSR) | fSCLK | 0 | 33 | MHz | Ultra Low Power Mode; min printed as D.C. | 68 | |
| Clock Frequency for READ instructions | fRSCLK | 33 | MHz | Ultra Low Power Mode | 68 | ||
| Clock Frequency for 2READ/DREAD instructions | fTSCLK | 8 | MHz | Ultra Low Power Mode | 68 | ||
| Clock Frequency for 4READ/QREAD instructions | fQ | 8 | MHz | Ultra Low Power Mode | 68 | ||
| Clock Frequency for 4PP | f4PP | 33 | MHz | Ultra Low Power Mode | 68 | ||
| Clock High Time, Normal Read | tCH | 13 | ns | Normal Read (fRSCLK) | 68 | ||
| Clock Low Time, Normal Read | tCL | 13 | ns | Normal Read (fRSCLK) | 68 | ||
| CS# Active Setup Time (relative to SCLK) | tSLCH | 5 | ns | 68 | |||
| CS# Not Active Hold Time (relative to SCLK) | tCHSL | 5 | ns | 68 | |||
| Data In Setup Time | tDVCH | 2 | ns | 68 | |||
| Data In Hold Time | tCHDX | 3 | ns | 68 | |||
| CS# Deselect Time, Read to next Read | tSHSL | 5 | ns | From Read to next Read | 68 | ||
| CS# Deselect Time, Write/Erase/Program to Read Status Register | tSHSL | 30 | ns | From Write/Erase/Program to Read Status Register | 68 | ||
| Output Disable Time | tSHQZ | 8 | ns | 68 | |||
| Clock Low to Output Valid | tCLQV | 12 | ns | Loading: 30pF | 68 | ||
| Clock Low to Output Valid | tCLQV | 10 | ns | Loading: 15pF | 68 | ||
| Output Hold Time | tCLQX | 0 | ns | 68 | |||
| Write Status Register Cycle Time | tW | 10 | 30 | ms | 68 | ||
| Erase Suspend Latency | tESL | 60 | us | Ultra Low Power Mode | 69 | ||
| Program Suspend Latency | tPSL | 60 | us | Ultra Low Power Mode | 69 | ||
| Byte-Program | tBP | 40 | 100 | us | 69 | ||
| Page Program Cycle Time | tPP | 3.2 | 10 | ms | 69 | ||
| Sector Erase Cycle Time | tSE | 58 | 240 | ms | 69 | ||
| Block Erase (32KB) Cycle Time | tBE32K | 1 | 3 | s | 69 | ||
| Block Erase (64KB) Cycle Time | tBE | 0.8 | 3.5 | s | 69 | ||
| Chip Erase Cycle Time | tCE | 30 | 60 | s | 69 | ||
| Erase/Program Cycle | 100000 | cycles | Ultra Low Power Mode | 75 |
CAD (KiCad official)
- Symbol:
MX25R1635FM1IL0 - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOP-8 (KiCad packages3D, STEP)
- 3D model files:
mx25r1635fm1il0-etched.step/mx25r1635fm1il0-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);mx25r1635fm1il0.step/mx25r1635fm1il0.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: MXIC(Macronix) datasheet (86 pp, sha256
c460d612ac50864b, retrieved 2026-10-27, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# MX25R1635FM1IL0
**MXIC(Macronix)** · NOR FLASH · SOP-8
MX25R1635FM1IL0 from MXIC(Macronix), in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | CS# | input | Chip Select input. |
| 2 | SO/SIO1 | bidirectional | Serial Data Output (for 1 x I/O) or Serial Data Input & Output (for 2 x I/O and 4 x I/O read modes). |
| 3 | WP#/SIO2 | bidirectional | Write Protection (active low) or Serial Data Input & Output for 4 x I/O read mode; internal pull-up is active while the pin is not physically connected. |
| 4 | GND | power_in | Ground. |
| 5 | SI/SIO0 | bidirectional | Serial Data Input (for 1 x I/O) or Serial Data Input & Output (for 4 x I/O read mode). |
| 6 | SCLK | input | Clock input. |
| 7 | RESET#/SIO3 | bidirectional | Hardware Reset pin (active low) or Serial Data Input & Output for 4 x I/O read mode; this part number (M1IL0) uses the RESET# option, and the internal pull-up is active while the pin is not physically connected. |
| 8 | VCC | power_in | Power supply, 1.65V-3.6V for read, erase and program operations. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | MXIC(Macronix) |
| Package | SOP-8 |
| Category | Memory |
| Pins | 8 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Ambient Operating Temperature (Industrial) | | -40 | | 85 | °C | Industrial grade | 64 |
| Storage Temperature | | -65 | | 150 | °C | | 64 |
| Applied Input Voltage | | -0.5 | | | V | -0.5V to VCC+0.5V | 64 |
| Applied Output Voltage | | -0.5 | | | V | -0.5V to VCC+0.5V | 64 |
| VCC to Ground Potential | VCC | -0.5 | | 4 | V | MX25R (1.65V-3.6V) | 64 |
| Operation Voltage | VCC | 1.65 | | 3.6 | V | Read, Erase and Program Operations | 4 |
| Input Capacitance | CIN | | | 6 | pF | TA = 25°C, f = 1.0 MHz, VIN = 0V | 64 |
| Output Capacitance | COUT | | | 8 | pF | TA = 25°C, f = 1.0 MHz, VOUT = 0V | 64 |
| Input Load Current | ILI | -2 | | 2 | uA | VCC = VCC Max, VIN = VCC or GND | 66 |
| Output Leakage Current | ILO | -2 | | 2 | uA | VCC = VCC Max, VOUT = VCC or GND | 66 |
| VCC Standby Current | ISB1 | | 5 | 24 | uA | VIN = VCC or GND, CS# = VCC | 66 |
| Deep Power-down Current | ISB2 | | 0.007 | 0.35 | uA | VIN = VCC or GND, CS# = VCC | 66 |
| VCC Read Current | ICC1 | | 2.8 | 4.5 | mA | f=16MHz (4x I/O), SCLK=0.1VCC/0.9VCC, SO=Open | 66 |
| VCC Read Current | ICC1 | | 2.2 | 4 | mA | f=33MHz, SCLK=0.1VCC/0.9VCC, SO=Open | 66 |
| VCC Read Current | ICC1 | | 1.9 | 3.5 | mA | f=8MHz (2x I/O), SCLK=0.1VCC/0.9VCC, SO=Open | 66 |
| VCC Program Current (PP) | ICC2 | | 3.5 | 6 | mA | Program in Progress, CS# = VCC | 66 |
| VCC Write Status Register (WRSR) Current | ICC3 | | 3.1 | 6 | mA | Program status register in progress, CS#=VCC | 66 |
| VCC Sector/Block (64K) Erase Current (SE/BE) | ICC4 | | 3.1 | 6 | mA | Erase in Progress, CS#=VCC | 66 |
| VCC Chip Erase Current (CE) | ICC5 | | 3.1 | 6 | mA | Erase in Progress, CS#=VCC | 66 |
| High Voltage Applied at WP# pin | Vhv | 7 | | 8 | V | Test Condition, VCC=2.0V | 66 |
| Input Low Voltage | VIL | -0.5 | | | V | Max printed as 0.2VCC | 66 |
| Output Low Voltage | VOL | | | 0.2 | V | IOL = 100uA | 66 |
| Clock Frequency (FAST_READ, RDSFDP, PP, SE, BE32K, BE, CE, DP, RES, WREN, WRDI, RDID, RDSR, WRSR) | fSCLK | 0 | | 33 | MHz | Ultra Low Power Mode; min printed as D.C. | 68 |
| Clock Frequency for READ instructions | fRSCLK | | | 33 | MHz | Ultra Low Power Mode | 68 |
| Clock Frequency for 2READ/DREAD instructions | fTSCLK | | | 8 | MHz | Ultra Low Power Mode | 68 |
| Clock Frequency for 4READ/QREAD instructions | fQ | | | 8 | MHz | Ultra Low Power Mode | 68 |
| Clock Frequency for 4PP | f4PP | | | 33 | MHz | Ultra Low Power Mode | 68 |
| Clock High Time, Normal Read | tCH | 13 | | | ns | Normal Read (fRSCLK) | 68 |
| Clock Low Time, Normal Read | tCL | 13 | | | ns | Normal Read (fRSCLK) | 68 |
| CS# Active Setup Time (relative to SCLK) | tSLCH | 5 | | | ns | | 68 |
| CS# Not Active Hold Time (relative to SCLK) | tCHSL | 5 | | | ns | | 68 |
| Data In Setup Time | tDVCH | 2 | | | ns | | 68 |
| Data In Hold Time | tCHDX | 3 | | | ns | | 68 |
| CS# Deselect Time, Read to next Read | tSHSL | 5 | | | ns | From Read to next Read | 68 |
| CS# Deselect Time, Write/Erase/Program to Read Status Register | tSHSL | 30 | | | ns | From Write/Erase/Program to Read Status Register | 68 |
| Output Disable Time | tSHQZ | | | 8 | ns | | 68 |
| Clock Low to Output Valid | tCLQV | | | 12 | ns | Loading: 30pF | 68 |
| Clock Low to Output Valid | tCLQV | | | 10 | ns | Loading: 15pF | 68 |
| Output Hold Time | tCLQX | 0 | | | ns | | 68 |
| Write Status Register Cycle Time | tW | | 10 | 30 | ms | | 68 |
| Erase Suspend Latency | tESL | | | 60 | us | Ultra Low Power Mode | 69 |
| Program Suspend Latency | tPSL | | | 60 | us | Ultra Low Power Mode | 69 |
| Byte-Program | tBP | | 40 | 100 | us | | 69 |
| Page Program Cycle Time | tPP | | 3.2 | 10 | ms | | 69 |
| Sector Erase Cycle Time | tSE | | 58 | 240 | ms | | 69 |
| Block Erase (32KB) Cycle Time | tBE32K | | 1 | 3 | s | | 69 |
| Block Erase (64KB) Cycle Time | tBE | | 0.8 | 3.5 | s | | 69 |
| Chip Erase Cycle Time | tCE | | 30 | 60 | s | | 69 |
| Erase/Program Cycle | | 100000 | | | cycles | Ultra Low Power Mode | 75 |
## CAD (KiCad official)
- Symbol: `MX25R1635FM1IL0`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOP-8 (KiCad packages3D, STEP)
- 3D model files: `mx25r1635fm1il0-etched.step` / `mx25r1635fm1il0-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `mx25r1635fm1il0.step` / `mx25r1635fm1il0.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [MXIC(Macronix) datasheet](docs/mx25r1635fm1il0-datasheet.pdf) (86 pp, sha256 `c460d612ac50864b`, retrieved 2026-10-27, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/mx25r1635fm1il0-datasheet.pdf)