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MX25L8006EM1I-12G

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MXIC Macronix NOR FLASH, SOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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MX25L8006EM1I-12G

MXIC Macronix · NOR FLASH · SOP-8

MX25L8006EM1I-12G from MXIC Macronix, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 CS# input Chip Select: serial access to the device is enabled by the CS# input, and when the device is not in operation with CS# high it is put in standby mode.
2 SO/SIO1 bidirectional Serial Data Output for 1 x I/O, and Serial Data Output (SIO1) in Dual Output mode.
3 WP# input Write protection input.
4 GND power_in Ground.
5 SI/SIO0 bidirectional Serial Data Input for 1 x I/O, and Serial Data Input & Output (SIO0) in Dual Output mode.
6 SCLK input Clock Input for the serial interface.
7 HOLD# input Hold, to pause the device without deselecting the device.
8 VCC power_in Power supply, +3.3V nominal.

Key specifications

Parameter Value
Manufacturer MXIC Macronix
Package SOP-8
Category Memory
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
VCC to Ground Potential -0.5 4 V 31
Applied Input Voltage -0.5 V 31
Applied Output Voltage -0.5 V 31
Storage Temperature -65 150 °C 31
Ambient Operating Temperature -40 85 °C Industrial grade 31
Input Voltage with respect to GND on all power pins, SI, CS# -1 V 48
Latch-up Current -100 100 mA Includes all pins except VCC. Test conditions: VCC = 3.0V, one pin at a time. 48
VCC Supply Voltage VCC 2.7 3.6 V Read, erase, and program operations 5
VCC Rise Time tVR 500000 us/V 46
VCC(min) to CS# low tVSL 200 us 45
Input Capacitance CIN 6 pF TA = 25°C, f = 1.0 MHz; VIN = 0V 31
Output Capacitance COUT 8 pF TA = 25°C, f = 1.0 MHz; VOUT = 0V 31
Input Load Current ILI -2 2 uA VCC = VCC Max, VIN = VCC or GND 33
Output Leakage Current ILO -2 2 uA VCC = VCC Max, VOUT = VCC or GND 33
VCC Standby Current ISB1 15 25 uA VIN = VCC or GND, CS# = VCC 33
Deep Power-down Current ISB2 10 uA VIN = VCC or GND, CS# = VCC 33
VCC Read Current ICC1 12 mA f=86MHz, fT=80MHz (2 x I/O read), SCLK=0.1VCC/0.9VCC, SO=Open 33
VCC Read Current ICC1 4 mA f=33MHz, SCLK=0.1VCC/0.9VCC, SO=Open 33
VCC Program Current (PP) ICC2 15 20 mA Program in Progress, CS# =VCC 33
VCC Write Status Register (WRSR) Current ICC3 3 15 mA Program status register in progress, CS#=VCC 33
VCC Sector Erase Current (SE) ICC4 9 15 mA Erase in Progress, CS#=VCC 33
VCC Chip Erase Current (CE) ICC5 15 20 mA Erase in Progress, CS#=VCC 33
Input Low Voltage VIL -0.5 V 33
Output Low Voltage VOL 0.4 V IOL = 1.6mA 33
Clock Frequency for FAST_READ, RDSFDP, PP, SE, BE, CE, DP, RES, RDP, WREN, WRDI, RDID, RDSR, WRSR fSCLK 86 MHz Instructions listed in name 34
Clock High Time tCH 5.5 ns fC=86MHz 34
Clock Low Time tCL 5.5 ns fC=86MHz 34
Clock Rise Time (peak to peak) tCLCH 0.1 V/ns Expressed as a slew-rate 34
Clock Fall Time (peak to peak) tCHCL 0.1 V/ns Expressed as a slew-rate 34
CS# Active Setup Time (relative to SCLK) tSLCH 5 ns 34
CS# Not Active Hold Time (relative to SCLK) tCHSL 5 ns 34
Data In Setup Time tDVCH 2 ns 34
Data In Hold Time tCHDX 5 ns 34
CS# Active Hold Time (relative to SCLK) tCHSH 5 ns 34
CS# Not Active Setup Time (relative to SCLK) tSHCH 5 ns 34
CS# Deselect Time tSHSL 15 ns Read 34
CS# Deselect Time tSHSL 40 ns Write 34
Output Disable Time tSHQZ 6 ns 34
Clock Low to Output Valid tCLQV 8 ns Loading 30pF 34
Clock Low to Output Valid tCLQV 6 ns Loading 15pF 34
HOLD# Setup Time (relative to SCLK) tHLCH 5 ns 34
HOLD# Hold Time (relative to SCLK) tCHHH 5 ns 34
HOLD Setup Time (relative to SCLK) tHHCH 5 ns 34
HOLD Hold Time (relative to SCLK) tCHHL 5 ns 34
HOLD to Output Low-Z tHHQX 6 ns 34
HOLD# to Output High-Z tHLQZ 6 ns 34
Write Protect Setup Time tWHSL 20 ns Only for WRSR when SRWD=1 34
Write Protect Hold Time tSHWL 100 ns Only for WRSR when SRWD=1 34
CS# High to Deep Power-down Mode tDP 10 us 34
CS# High to Standby Mode without Electronic Signature Read tRES1 8.8 us 34
CS# High to Standby Mode with Electronic Signature Read tRES2 8.8 us 34
Write Status Register Cycle Time tW 5 40 ms 34
Byte-Program tBP 9 50 us 34
Page Program Cycle Time tPP 0.6 3 ms 34
Sector Erase Cycle Time tSE 40 200 ms 34
Block Erase Cycle Time tBE 0.4 2 s 34
Chip Erase Cycle Time tCE 3.5 6 s 34

CAD (KiCad official)

  • Symbol: MX25L8006EM1I-12G
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOP-8 (KiCad packages3D, STEP)
  • 3D model files: mx25l8006em1i-12g-etched.step / mx25l8006em1i-12g-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); mx25l8006em1i-12g.step / mx25l8006em1i-12g.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: MXIC Macronix datasheet (57 pp, sha256 aef99b17b4a32eac, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF