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MX25L3236FM2I-08G

Public Made by Adom

by adom

MXIC(Macronix) NOR FLASH, SOIC-8-208mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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Contents

README

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MX25L3236FM2I-08G

MXIC(Macronix) · NOR FLASH · SOIC-8-208mil

MX25L3236FM2I-08G from MXIC(Macronix), in a SOIC-8-208mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 CS# input Chip select input: serial access to the device is enabled by CS#, and the device is put in standby mode when CS# is high and the device is not in operation.
2 SO/SIO1 bidirectional Serial data output for 1xI/O, and serial data input and output (SIO1) for 2xI/O and 4xI/O modes.
3 WP#/SIO2 bidirectional Write protection, active low, in single I/O mode, or serial data input and output (SIO2) for 4xI/O mode; hardware protection requires SRWD set to 1 and WP# driven low, and the internal pull-up is disabled if the pin is physically connected in the system.
4 GND power_in Ground reference for the device.
5 SI/SIO0 bidirectional Serial data input for 1xI/O, and serial data input and output (SIO0) for 2xI/O and 4xI/O modes.
6 SCLK input Clock input for serial interface timing.
7 HOLD#/SIO3 bidirectional Pauses the device without deselecting it in single I/O mode, or serial data input and output (SIO3) for 4xI/O mode; the internal pull-up is disabled if the pin is physically connected in the system.
8 VCC power_in Power supply, specified as +3.0V on the pin configuration page.

Key specifications

Parameter Value
Manufacturer MXIC(Macronix)
Package SOIC-8-208mil
Category Memory
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Input Load Current ILI -2 2 uA VCC = VCC Max, VIN = VCC or GND 66
Output Leakage Current ILO -2 2 uA VCC = VCC Max, VOUT = VCC or GND 66
VCC Standby Current ISB1 10 50 uA VIN = VCC or GND, CS# = VCC 66
Deep Power-down Current ISB2 20 uA VIN = VCC or GND, CS# = VCC 66
VCC Read Current ICC1 2.5 5 mA f=50MHz, SCLK=0.1VCC/0.9VCC, SO=Open 66
VCC Read Current (4 x I/O read) ICC1 10 17 mA fQ=133MHz (4 x I/O read), SCLK=0.1VCC/0.9VCC, SO=Open 66
VCC Program Current (PP) ICC2 10 15 mA Program in Progress, CS# = VCC 66
VCC Write Status Register (WRSR) Current ICC3 10 15 mA Program status register in progress, CS#=VCC 66
VCC Sector Erase Current (SE) ICC4 10 15 mA Erase in Progress, CS#=VCC 66
VCC Chip Erase Current (CE) ICC5 10 15 mA Erase in Progress, CS#=VCC 66
Input Low Voltage VIL -0.5 0.8 V 66
Output Low Voltage VOL 0.4 V IOL = 1.6mA 66
Input Capacitance CIN 6 pF VIN = 0V 64
Output Capacitance COUT 8 pF VOUT = 0V 64
Clock Frequency (FAST_READ, PP, SE, BE32K, BE, CE, RES, WREN, WRDI, RDID, RDSR, WRSR) fSCLK 133 MHz Instructions listed; printed min is D.C. 67
Clock Frequency for READ instructions fRSCLK 50 MHz 67
Clock Frequency for 2READ/DREAD instructions fTSCLK 133 MHz 67
Clock Frequency for 4READ/QREAD instructions fQ 133 MHz 67
Clock Frequency for 4PP (Quad page program) f4PP 133 MHz 67
Clock High Time (Normal Read) tCH 9 ns Normal Read (fRSCLK) 67
Clock Low Time (Normal Read) tCL 9 ns Normal Read (fRSCLK) 67
CS# Active Setup Time (relative to SCLK) tSLCH 4 ns 67
CS# Not Active Hold Time (relative to SCLK) tCHSL 4 ns 67
Data In Setup Time tDVCH 2 ns 67
Data In Hold Time tCHDX 3 ns 67
CS# Active Hold Time (relative to SCLK) tCHSH 4 ns 67
CS# Not Active Setup Time (relative to SCLK) tSHCH 4 ns 67
CS# Deselect Time (From Read to next Read) tSHSL 15 ns From Read to next Read 67
CS# Deselect Time (From Write/Erase/Program to Read Status Register) tSHSL 50 ns From Write/Erase/Program to Read Status Register 67
Output Disable Time tSHQZ 10 ns 2.65V-3.6V 67
Output Disable Time tSHQZ 8 ns 3.0V-3.6V 67
HOLD# Setup Time (relative to SCLK) tHLCH 5 ns 67
HOLD# Hold Time (relative to SCLK) tCHHH 5 ns 67
HOLD Setup Time (relative to SCLK) tHHCH 5 ns 67
HOLD Hold Time (relative to SCLK) tCHHL 5 ns 67
HOLD to Output Low-Z tHHQX 10 ns Loading=30pF, 2.65V-3.6V 67
HOLD to Output Low-Z tHHQX 8 ns Loading=30pF, 3.0V-3.6V 67
HOLD# to Output High-Z tHLQZ 10 ns Loading=30pF, 2.65V-3.6V 67
HOLD# to Output High-Z tHLQZ 8 ns Loading=30pF, 3.0V-3.6V 67
Clock Low to Output Valid tCLQV 6 ns VCC=2.65V~3.6V, Loading 15pF 67
Clock Low to Output Valid tCLQV 8 ns VCC=2.65V~3.6V, Loading 30pF 67
Output Hold Time tCLQX 1 ns 67
Write Protect Setup Time tWHSL 20 ns 67
Write Protect Hold Time tSHWL 100 ns 67
Erase Suspend Latency tESL 20 us 67
Program Suspend Latency tPSL 20 us 67
Latency between Program Resume and next Suspend tPRS 0.3 100 us 67
Latency between Erase Resume and next Suspend tERS 0.3 200 us 67
Recovery Time from Read tRCR 20 us 68
Recovery Time from Program tRCP 20 us 68
Recovery Time from Erase tRCE 12 ms 68
CS# High to Deep Power-down Mode tDP 10 us 68
CS# High to Standby Mode without Electronic Signature Read tRES1 100 us 68
CS# High to Standby Mode with Electronic Signature Read tRES2 100 us 68
Write Status Register Cycle Time tW 40 ms 68
Byte-Program Cycle Time tBP 10 50 us 68
Page Program Cycle Time tPP 0.33 1.2 ms 68
Sector Erase Cycle Time (4KB) tSE 25 200 ms 68
Block Erase Cycle Time (32KB) tBE32K 0.14 0.6 s 68
Block Erase Cycle Time (64KB) tBE 0.25 1 s 68
Chip Erase Cycle Time tCE 10 30 s 68
Write Security Register Time tWSR 1 ms 68
VCC Rise Time tVR 500000 us/V 71
VCC(min.) to device operation tVSL 800 us 73
Write Inhibit Voltage VWI 1.5 2.5 V 73
VCC voltage needed to below VPWD for ensuring initialization VPWD 0.9 V 73
The minimum duration for ensuring initialization will occur tPWD 300 us 73
VCC Power Supply VCC 2.65 3.6 V 73
Ambient Operating Temperature -40 85 °C Industrial grade 64
Storage Temperature -65 150 °C 64
Applied Input Voltage -0.5 4.6 V 64
Applied Output Voltage -0.5 4.6 V 64
VCC to Ground Potential -0.5 4.6 V 64
Overshoot below VSS -2 V Up to 20ns 64
Input Voltage with respect to GND on all power pins, SI, CS# -1 V Max printed as 2 VCCmax 74
Input Voltage with respect to GND on SO -1 V Max printed as VCC + 1.0V 74
Input/Output Current -100 100 mA Includes all pins except VCC; VCC = 3.0V, one pin at a time 74
Data Retention 20 years 55°C 74
Erase/Program Cycle 100000 cycles 74

CAD (KiCad official)

  • Symbol: MX25L3236FM2I-08G
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8-208mil (KiCad packages3D, STEP)
  • 3D model files: mx25l3236fm2i-08g-etched.step / mx25l3236fm2i-08g-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); mx25l3236fm2i-08g.step / mx25l3236fm2i-08g.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: MXIC(Macronix) datasheet (79 pp, sha256 8811ba6a33336f9b, retrieved 2026-10-20, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF