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MX1210R

Public Made by Adom

by adom

Wuxi Maxinmicro AC-DC Controllers And Regulators, SOT23-6L. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentpower management (pmic)mx1210rfactory-2.0.0extractor-text
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3D Model

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Symbol & Footprint

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Datasheet

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Contents

README

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MX1210R

Wuxi Maxinmicro · AC-DC Controllers And Regulators · SOT23-6L

MX1210R from Wuxi Maxinmicro, in a SOT23-6L. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 GND power_in Ground pin for the controller, with the datasheet giving no further electrical limit for it.
2 FB input Feedback input pin whose voltage, together with the CS current-sense signal, sets the PWM duty cycle; FB input voltage is rated -0.3 to 7V absolute maximum.
3 RT input Connect an NTC between this pin and ground for over-temperature protection, and leave it floating to disable the latch protection; RT input voltage is rated -0.3 to 7V absolute maximum.
4 CS input Current sense pin where the sense resistor is connected to ground; CS input voltage is rated -0.3 to 7V absolute maximum.
5 VDD power_in Power supply pin with a recommended VDD supply range of 10-48V and a 60V DC absolute maximum rating.
6 GATE output Gate driver output for the external MOSFET, clamped internally to 11.5V (VG_clamping).

Key specifications

Parameter Value
Manufacturer Wuxi Maxinmicro
Package SOT23-6L
Category Power Management (PMIC)
Pins 6

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
VDD startup current I startup 5 20 μA VDD=UVLO_OFF-1V 4
VDD normal operation current I_VDD 2.8 3.3 mA VFB=3V 4
Burst mode operation current I_ Burst 0.45 0.48 mA VFB=0.5V 4
VDD under voltage lockout enter UVLO_ON 6.7 7.2 7.7 V 4
VDD under voltage lockout exit UVLO_OFF 15.5 16.5 17.5 V 4
Over voltage protection voltage VDD_OVP 50 52 54 V FB=3V, VDD ramp up until gate clock is off 4
Max duty cycle D_MAX 70 90 % VDD=18V, VFB=3V, VCS=0.3V 4
Over load protection VFB_OLP 4 4.4 4.8 V 4
Internal current limiting threshold voltage VCS_PK 0.492 0.5 0.508 V with zero duty cycle 4
Secondary rectifier diode short protection threshold voltage VCS_SRST 1.1 1.2 1.3 V 4
Normal frequency of high output voltage FOSC_NOM 60 65 70 kHz VDD=15V, FB=3V，CS=0V 4
Frequency jittering FOSC_JT -7 7 % 4
Threshold voltage for OTP VRT_TH 0.95 1 1.05 V 5
Output current of RT pin IRT 39.5 40 40.5 uA 5
VDD DC supply voltage 60 V 2
FB input voltage -0.3 7 V 2
CS input voltage -0.3 7 V 2
RT input voltage -0.3 7 V 2
Junction temperature TJ -40 150 ℃ 2
Ambient temperature TA -40 85 ℃ 2
Storage temperature TSTG -55 150 ℃ 2
ESD (HBM) -2 2 kV 2
Leading temperature 260 ℃ soldering, 10secs 2
VDD supply voltage VDD 10 48 V 2
Power dissipation PD 0.59 W @TA=25℃ 2
VDD pull-up PMOS active V_Pull/up 10 V 4
Latch release voltage V_Latch 4.8 V External OTP/VDD_OVP 4
Restart time for auto-recovery protection T_recovery 1.4 s Other protection 4
FB open loop voltage VFB_Open 5.1 V 4
PWM input gain Avcs 3.3 V/V ΔVFB/ΔVCS 4
FB pin short circuit current IFB_short 250 μA Current for short FB to GND 4
Threshold enters green mode VFB_green 2.05 V 4
Threshold exits burst mode VREF_burst_H 1.2 V 4
Threshold enters burst mode VREF_burst_L 1.1 V 4
Over load debounce time TD_OLP 60 ms 4
Input impedance RFB_IN 20 kΩ 4
Soft start time of CS threshold TCS_SST 4 ms 4
Leading edge blanking time T_blanking 300 ns 4
Over current detection and delay TD_OC 90 ns From over current occurs till gate driver turns off 4
CS voltage clamper VCS_PKclamp 0.715 V 4
Shuffling frequency FOSC_shuffling 240 Hz 5
Frequency temperature stability FOSC_TEMP 1 % 5
Frequency VDD voltage stability FOSC_VDD 1 % 5
Burst mode frequency FOSC_burst 22 kHz 5
Gate low voltage VGL 1 V @ VDD=15V, Io=20mA 5
Gate high voltage VGH 8 V @ VDD=15V, Io=20mA 5
Gate clamp voltage VG_clamping 11.5 V 5
Gate voltage rising time T_rise 200 ns 1.2V ~ 10.8V @ CL=1000pF 5
Gate voltage falling time T_fall 35 ns 10.8V ~ 1.2V @ CL=1000pF 5
RT open loop voltage VRT_Open 2 V 5
Thermal protect debounce time TD_OTP 32 Cycle 5
Internal OTP threshold OTP_in 155 ℃ 5
Package thermal resistance, junction to ambient RθJA 200 ℃/W SOT23-6 2

CAD (KiCad official)

  • Symbol: MX1210R
  • Footprint: Package_TO_SOT_SMD:SOT-23-6
  • 3D model: SOT23-6L (KiCad packages3D, STEP)
  • 3D model files: mx1210r-etched.step / mx1210r-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); mx1210r.step / mx1210r.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Wuxi Maxinmicro datasheet (11 pp, sha256 74784c5a3f69f307, retrieved 2026-10-17, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF