component
MX1210P
Public Made by Adomby adom
Wuxi Maxinmicro AC-DC Controllers And Regulators, SOT-23-6. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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MX1210P
Wuxi Maxinmicro · AC-DC Controllers And Regulators · SOT-23-6
MX1210P from Wuxi Maxinmicro, in a SOT-23-6. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GND | power_in | Ground pin for the controller, which the datasheet's terminal table identifies as the IC ground reference. |
| 2 | FB | input | Feedback input whose voltage, together with the CS pin, sets the PWM duty cycle; the absolute maximum input voltage is -0.3 to 7V. |
| 3 | DMAG | input | Demagnetization input that senses input and output voltages from the auxiliary winding; the absolute maximum input voltage is -0.3 to 7V. |
| 4 | CS | input | Current sense pin, connected through resistors to ground, with an absolute maximum input voltage of -0.3 to 7V. |
| 5 | VDD | power_in | Power supply pin with a recommended VDD supply range of 10-48V and an absolute maximum DC supply voltage of 60V. |
| 6 | GATE | output | Gate driver output for the external MOSFET, with a gate clamp voltage of 11.5 V (typical). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Wuxi Maxinmicro |
| Package | SOT-23-6 |
| Category | Power Management (PMIC) |
| Pins | 6 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| VDD supply voltage | VDD | 10 | 48 | V | 2 | ||
| Power dissipation | PD | 0.59 | W | @TA=25℃ | 2 | ||
| VDD DC supply voltage | VDD | 60 | V | 2 | |||
| FB input voltage | FB | -0.3 | 7 | V | 2 | ||
| CS input voltage | CS | -0.3 | 7 | V | 2 | ||
| DMAG input voltage | DMAG | -0.3 | 7 | V | 2 | ||
| Junction temperature | TJ | -40 | 150 | ℃ | 2 | ||
| Ambient temperature | TA | -40 | 85 | ℃ | 2 | ||
| Storage temperature | TSTG | -55 | 150 | ℃ | 2 | ||
| ESD(HBM) | -2 | 2 | kV | 2 | |||
| Leading temperature | 260 | ℃ | soldering, 10secs | 2 | |||
| VDD startup current | I_startup | 2 | 10 | μA | VDD=UVLO_OFF-1V | 4 | |
| VDD normal operation current | I_VDD | 1 | 2 | 2.5 | mA | VFB=3V | 4 |
| Burst mode operation current | I_Burst | 0.36 | 0.45 | mA | VFB=0.5V | 4 | |
| VDD under voltage lockout enter | UVLO_ON | 6.7 | 7.2 | 7.7 | V | 4 | |
| VDD under voltage lockout exit | UVLO_OFF | 15.2 | 16.2 | 17.2 | V | 4 | |
| Over voltage protection voltage | VDD_OVP | 50 | 52 | 54 | V | FB=3V, VDD ramp up until gate clock is off | 4 |
| Max duty cycle | D_MAX | 70 | 90 | % | @ VDD=18V, VFB=3V, VCS=0.3V | 4 | |
| Over load protection | VFB_OLP | 4.7 | 5 | 5.5 | V | 4 | |
| Internal current limiting threshold voltage with zero duty cycle | VCS_PK | 0.494 | 0.5 | 0.506 | V | 4 | |
| Secondary rectifier diode short protection threshold voltage | VCS_SRST | 1.1 | 1.2 | 1.3 | V | 4 | |
| External OTP delay time | TD_EXOTP | 42 | 49 | 56 | ms | 4 | |
| Normal frequency of high output voltage | FOSC_NOM | 61 | 65 | 69 | kHz | VDD=18V, FB=3V, DMAG 加114uA, CS=3.3V | 5 |
| Frequency jittering | FOSC_JT | -7 | 7 | % | 5 | ||
| Output over voltage protection threshold voltage | VTH_OVP | 3.5 | 3.6 | 3.7 | V | 5 | |
| Output under-voltage protection threshold voltage | VTH_UVP | 0.3 | 0.35 | 0.4 | V | 5 | |
| Output under voltage protection delay time | TD_UVP | 9 | 12 | 15 | ms | 5 | |
| Brown in protection threshold current | IDMAG_BNI | 115 | 130 | 145 | μA | 5 | |
| Brown out protection threshold current | IDMAG_BNO | 120 | 135 | 150 | μA | 5 | |
| Brown out protection delay time | TD_BNO | 42 | 49 | 56 | ms | FOSC=83KHz | 5 |
| Package dissipation rating junction-to-ambient thermal resistance (SOT23-6) | RθJA | 200 | ℃/W | 2 | |||
| Pull-up PMOS active | V_Pull/up | 10 | V | 4 | |||
| Restart time for auto-recovery protection | T_recovery | 1.4 | s | Other protection | 4 | ||
| PWM input gain ΔVFB/ΔVCS | Avcs | 3.5 | V/V | VDMAG>1.25V | 4 | ||
| PWM input gain ΔVFB/ΔVCS | Avcs | 4.5 | V/V | VDMAG<1.25V | 4 | ||
| FB pin short circuit current | IFB_short | 250 | μA | Current for short FB to GND | 4 | ||
| The threshold enters green mode | VFB_green | 2.05 | V | 4 | |||
| The threshold exits burst mode | VREF_burst_H | 1.2 | V | 4 | |||
| The threshold enters burst mode | VREF_burst_L | 1.1 | V | 4 | |||
| Over load debounce time | TD_OLP | 13 | s | 4 | |||
| Peak load debounce time | TD_PK | 40 | ms | 4 | |||
| Input impedance | RFB_IN | 20 | kΩ | 4 | |||
| Soft start time of CS threshold | TCS_SST | 4 | ms | 4 | |||
| Leading edge blanking time | T_blanking | 300 | ns | 4 | |||
| Over current detection and delay | TD_OC | 90 | ns | From over current occurs till gate driver turns off | 4 | ||
| CS voltage clamper | VCS_PKclamp | 0.715 | V | 4 | |||
| External OTP threshold voltage | VCS_EXOTP | 0.8 | V | DMAG=1.8V | 4 | ||
| Peak load frequency | FOSC_PK | 130 | kHz | FB=3V | 5 | ||
| Frequency temperature stability | FOSC_TEMP | 1 | % | 5 | |||
| Frequency VDD voltage stability | FOSC_VDD | 1 | % | 5 | |||
| Burst mode frequency | FOSC_burst | 22 | kHz | 5 | |||
| Gate low voltage | VGL | 1 | V | VDD=15V, Io=20mA | 5 | ||
| Gate high voltage | VGH | 8 | V | VDD=15V, Io=20mA | 5 | ||
| Gate clamp voltage | VG_clamping | 11.5 | V | 5 | |||
| Gate voltage rising time | T_rise | 240 | ns | 1.2V ~ 10.8V @ CL=1000pF | 5 | ||
| Gate voltage falling time | T_fall | 25 | ns | 10.8V ~ 1.2V @ CL=1000pF | 5 | ||
| Blanking time of DMAG pin @ light load | TBLK_LL | 1.7 | μs | VFB<2.05V | 5 | ||
| Blanking time of DMAG pin @ high load | TBLK_HL | 2.3 | μs | VFB>2.05V | 5 | ||
| Maximum DMAG sourcing current | IDMAG_MAX | 1000 | μA | 5 | |||
| Internal OTP | OTP_in | 155 | ℃ | 5 |
CAD (KiCad official)
- Symbol:
MX1210P - Footprint:
Package_TO_SOT_SMD:SOT-23-6 - 3D model: SOT-23-6 (KiCad packages3D, STEP)
- 3D model files:
mx1210p-etched.step/mx1210p-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);mx1210p.step/mx1210p.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Wuxi Maxinmicro datasheet (13 pp, sha256
9138b0af23a8be9c, retrieved 2026-10-17, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# MX1210P
**Wuxi Maxinmicro** · AC-DC Controllers And Regulators · SOT-23-6
MX1210P from Wuxi Maxinmicro, in a SOT-23-6. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GND | power_in | Ground pin for the controller, which the datasheet's terminal table identifies as the IC ground reference. |
| 2 | FB | input | Feedback input whose voltage, together with the CS pin, sets the PWM duty cycle; the absolute maximum input voltage is -0.3 to 7V. |
| 3 | DMAG | input | Demagnetization input that senses input and output voltages from the auxiliary winding; the absolute maximum input voltage is -0.3 to 7V. |
| 4 | CS | input | Current sense pin, connected through resistors to ground, with an absolute maximum input voltage of -0.3 to 7V. |
| 5 | VDD | power_in | Power supply pin with a recommended VDD supply range of 10-48V and an absolute maximum DC supply voltage of 60V. |
| 6 | GATE | output | Gate driver output for the external MOSFET, with a gate clamp voltage of 11.5 V (typical). |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Wuxi Maxinmicro |
| Package | SOT-23-6 |
| Category | Power Management (PMIC) |
| Pins | 6 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| VDD supply voltage | VDD | 10 | | 48 | V | | 2 |
| Power dissipation | PD | | | 0.59 | W | @TA=25℃ | 2 |
| VDD DC supply voltage | VDD | | | 60 | V | | 2 |
| FB input voltage | FB | -0.3 | | 7 | V | | 2 |
| CS input voltage | CS | -0.3 | | 7 | V | | 2 |
| DMAG input voltage | DMAG | -0.3 | | 7 | V | | 2 |
| Junction temperature | TJ | -40 | | 150 | ℃ | | 2 |
| Ambient temperature | TA | -40 | | 85 | ℃ | | 2 |
| Storage temperature | TSTG | -55 | | 150 | ℃ | | 2 |
| ESD(HBM) | | -2 | | 2 | kV | | 2 |
| Leading temperature | | | | 260 | ℃ | soldering, 10secs | 2 |
| VDD startup current | I_startup | | 2 | 10 | μA | VDD=UVLO_OFF-1V | 4 |
| VDD normal operation current | I_VDD | 1 | 2 | 2.5 | mA | VFB=3V | 4 |
| Burst mode operation current | I_Burst | | 0.36 | 0.45 | mA | VFB=0.5V | 4 |
| VDD under voltage lockout enter | UVLO_ON | 6.7 | 7.2 | 7.7 | V | | 4 |
| VDD under voltage lockout exit | UVLO_OFF | 15.2 | 16.2 | 17.2 | V | | 4 |
| Over voltage protection voltage | VDD_OVP | 50 | 52 | 54 | V | FB=3V, VDD ramp up until gate clock is off | 4 |
| Max duty cycle | D_MAX | 70 | | 90 | % | @ VDD=18V, VFB=3V, VCS=0.3V | 4 |
| Over load protection | VFB_OLP | 4.7 | 5 | 5.5 | V | | 4 |
| Internal current limiting threshold voltage with zero duty cycle | VCS_PK | 0.494 | 0.5 | 0.506 | V | | 4 |
| Secondary rectifier diode short protection threshold voltage | VCS_SRST | 1.1 | 1.2 | 1.3 | V | | 4 |
| External OTP delay time | TD_EXOTP | 42 | 49 | 56 | ms | | 4 |
| Normal frequency of high output voltage | FOSC_NOM | 61 | 65 | 69 | kHz | VDD=18V, FB=3V, DMAG 加114uA, CS=3.3V | 5 |
| Frequency jittering | FOSC_JT | -7 | | 7 | % | | 5 |
| Output over voltage protection threshold voltage | VTH_OVP | 3.5 | 3.6 | 3.7 | V | | 5 |
| Output under-voltage protection threshold voltage | VTH_UVP | 0.3 | 0.35 | 0.4 | V | | 5 |
| Output under voltage protection delay time | TD_UVP | 9 | 12 | 15 | ms | | 5 |
| Brown in protection threshold current | IDMAG_BNI | 115 | 130 | 145 | μA | | 5 |
| Brown out protection threshold current | IDMAG_BNO | 120 | 135 | 150 | μA | | 5 |
| Brown out protection delay time | TD_BNO | 42 | 49 | 56 | ms | FOSC=83KHz | 5 |
| Package dissipation rating junction-to-ambient thermal resistance (SOT23-6) | RθJA | | 200 | | ℃/W | | 2 |
| Pull-up PMOS active | V_Pull/up | | 10 | | V | | 4 |
| Restart time for auto-recovery protection | T_recovery | | 1.4 | | s | Other protection | 4 |
| PWM input gain ΔVFB/ΔVCS | Avcs | | 3.5 | | V/V | VDMAG>1.25V | 4 |
| PWM input gain ΔVFB/ΔVCS | Avcs | | 4.5 | | V/V | VDMAG<1.25V | 4 |
| FB pin short circuit current | IFB_short | | 250 | | μA | Current for short FB to GND | 4 |
| The threshold enters green mode | VFB_green | | 2.05 | | V | | 4 |
| The threshold exits burst mode | VREF_burst_H | | 1.2 | | V | | 4 |
| The threshold enters burst mode | VREF_burst_L | | 1.1 | | V | | 4 |
| Over load debounce time | TD_OLP | | 13 | | s | | 4 |
| Peak load debounce time | TD_PK | | 40 | | ms | | 4 |
| Input impedance | RFB_IN | | 20 | | kΩ | | 4 |
| Soft start time of CS threshold | TCS_SST | | 4 | | ms | | 4 |
| Leading edge blanking time | T_blanking | | 300 | | ns | | 4 |
| Over current detection and delay | TD_OC | | 90 | | ns | From over current occurs till gate driver turns off | 4 |
| CS voltage clamper | VCS_PKclamp | | 0.715 | | V | | 4 |
| External OTP threshold voltage | VCS_EXOTP | | 0.8 | | V | DMAG=1.8V | 4 |
| Peak load frequency | FOSC_PK | | 130 | | kHz | FB=3V | 5 |
| Frequency temperature stability | FOSC_TEMP | | 1 | | % | | 5 |
| Frequency VDD voltage stability | FOSC_VDD | | 1 | | % | | 5 |
| Burst mode frequency | FOSC_burst | | 22 | | kHz | | 5 |
| Gate low voltage | VGL | | 1 | | V | VDD=15V, Io=20mA | 5 |
| Gate high voltage | VGH | | 8 | | V | VDD=15V, Io=20mA | 5 |
| Gate clamp voltage | VG_clamping | | 11.5 | | V | | 5 |
| Gate voltage rising time | T_rise | | 240 | | ns | 1.2V ~ 10.8V @ CL=1000pF | 5 |
| Gate voltage falling time | T_fall | | 25 | | ns | 10.8V ~ 1.2V @ CL=1000pF | 5 |
| Blanking time of DMAG pin @ light load | TBLK_LL | | 1.7 | | μs | VFB<2.05V | 5 |
| Blanking time of DMAG pin @ high load | TBLK_HL | | 2.3 | | μs | VFB>2.05V | 5 |
| Maximum DMAG sourcing current | IDMAG_MAX | | 1000 | | μA | | 5 |
| Internal OTP | OTP_in | | 155 | | ℃ | | 5 |
## CAD (KiCad official)
- Symbol: `MX1210P`
- Footprint: `Package_TO_SOT_SMD:SOT-23-6`
- 3D model: SOT-23-6 (KiCad packages3D, STEP)
- 3D model files: `mx1210p-etched.step` / `mx1210p-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `mx1210p.step` / `mx1210p.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Wuxi Maxinmicro datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8756597263722524672) (13 pp, sha256 `9138b0af23a8be9c`, retrieved 2026-10-17, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/mx1210p-datasheet.pdf)