component
MT6501GT-ADD-R
Public Made by Adomby adom
Magn Tek Position Sensor, TSSOP-16. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
| Name | Last updated |
|---|---|
| docs | 3d ago |
| viewers | 28d ago |
| mt6501gt-add-r-etched.fit.json | 3d ago |
| mt6501gt-add-r-etched.glb | 3d ago |
| mt6501gt-add-r-etched.step | 3d ago |
| mt6501gt-add-r.glb | 28d ago |
| mt6501gt-add-r.kicad_mod | 28d ago |
| mt6501gt-add-r.kicad_sym | 28d ago |
| mt6501gt-add-r.lbr | 28d ago |
| mt6501gt-add-r.step | 28d ago |
| package.json | 28d ago |
| page.json | 11d ago |
| README.md | 17d ago |
MT6501GT-ADD-R
Magn Tek · Position Sensor · TSSOP-16
MT6501GT-ADD-R from Magn Tek, in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | T3_1 | bidirectional | CH1 internal test mode pin Test3. Reserved for factory/internal test use. |
| 2 | VSS_1 | power_in | CH1 ground reference. |
| 3 | VDD_1 | power_in | CH1 5V supply input (VDD range 4.5-5.5V, absolute max ±30V). |
| 4 | CSN_1/T0_1 | bidirectional | CH1 SPI chip-select (CSN) input, muxed with internal test mode Test0. |
| 5 | SWO_2/T1_2 | bidirectional | CH2 switch output (SWO) - angle-position switch output, muxed with internal test mode Test1. |
| 6 | OUT_2 | bidirectional | CH2 analog output, PWM output, or single-wire (OWI) programming interface. Output mode selected by Output Mode register. |
| 7 | SCK_2 | input | CH2 SPI clock signal input. |
| 8 | SDAT_2/T2_2 | bidirectional | CH2 SPI data, muxed with internal test mode Test2. |
| 9 | T3_2 | bidirectional | CH2 internal test mode pin Test3. Reserved for factory/internal test use. |
| 10 | VSS_2 | power_in | CH2 ground reference. |
| 11 | VDD_2 | power_in | CH2 5V supply input (VDD range 4.5-5.5V, absolute max ±30V). |
| 12 | CSN_2/T0_2 | bidirectional | CH2 SPI chip-select (CSN) input, muxed with internal test mode Test0. |
| 13 | SWO_1/T1_1 | bidirectional | CH1 switch output (SWO) - angle-position switch output, muxed with internal test mode Test1. |
| 14 | SCK_1 | input | CH1 SPI clock signal input. |
| 15 | OUT_1 | bidirectional | CH1 analog output, PWM output, or single-wire (OWI) programming interface. Output mode selected by Output Mode register. |
| 16 | SDAT_1/T2_1 | bidirectional | CH1 SPI data, muxed with internal test mode Test2. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Magn Tek |
| Package | TSSOP-16 |
| Category | Sensor |
| Pins | 16 |
Ordering variants
Same part, different packaging or reel option.
MT6501GT-ADD-RCT-ADDMT6501GT-ADD-R
CAD (KiCad official)
- Symbol:
MT6501GT-ADD-R - Footprint:
Package_SO:TSSOP-16_4.4x5mm_P0.65mm - 3D model: TSSOP-16 (KiCad packages3D, STEP)
- 3D model files:
mt6501gt-add-r-etched.step/mt6501gt-add-r-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);mt6501gt-add-r.step/mt6501gt-add-r.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Magn Tek datasheet (23 pp, sha256
ddb1a3fb7567314b, retrieved 2026-08-17, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).